xilinx::AIE Namespace Reference

Include the generated interface declarations. More...

Namespaces
namespace	aie1_port_id
namespace	aie2_port_id

Classes
class	AIE1TargetModel
class	AIE2TargetModel
struct	AIEOpRemoval
struct	AIEPathfinderPass
	Overall Flow: rewrite switchboxes to assign unassigned connections, ensure this can be done concurrently ( by different threads) More...
struct	AIERTControl
class	AIETargetModel
class	BaseNPU1TargetModel
class	BaseNPU2TargetModel
struct	BitFieldInfo
	Bit field information for a register. More...
class	DynamicTileAnalysis
struct	EventInfo
	Event information. More...
struct	HasValidBDs
struct	HasValidDMAChannels
struct	IsFlowEndPoint
struct	MyOffsetSizeAndStrideOpInterface
struct	MyOffsetSizeAndStrideOpInterfaceTrait
class	NPU2TargetModel
class	Pathfinder
class	Placer
class	RegisterDatabase
	Register and event database for a specific architecture. More...
struct	RegisterInfo
	Register information. More...
struct	ResetConfig
class	Router
class	SequentialPlacer
struct	SkipAccessibilityCheckTrait
struct	TileAvailability
class	VC1902TargetModel
class	VE2302TargetModel
class	VE2802TargetModel
class	VirtualizedNPU1TargetModel
class	VirtualizedNPU2TargetModel

Typedefs
using	Port = Port { WireBundle bundle
using	Connect = Connect { Port src
using	DMAChannel = DMAChannel { DMAChannelDir direction
using	TileID = TileID { friend std::ostream &operator<<(std::ostream &os, const TileID &s) { os<< "TileID("<< s.col<< ", "<< s.row<< ")"
using	SwitchboxConnect = SwitchboxConnect { SwitchboxConnect()=default
using	PathEndPoint = PathEndPoint { PathEndPoint()=default
using	Flow = Flow { int packetGroupId
using	SwitchSetting = SwitchSetting { SwitchSetting()=default
using	SwitchSettings = std::map< TileID, SwitchSetting >
using	PlacementResult = llvm::DenseMap< mlir::Operation *, TileID >

Enumerations
enum	AIEToConfigurationOutputType { Transaction , ControlPacket }
enum class	ResetTileType : unsigned {   None = 0 , ShimNOC = 1 << 0 , MemTile = 1 << 1 , CoreTile = 1 << 2 ,   All = ShimNOC | MemTile | CoreTile }
enum class	ResetMode {   Never , IfUsed , IfUsedFineGrained , IfChanged ,   IfChangedFineGrained , Always }
enum class	Connectivity { INVALID = 0 , AVAILABLE = 1 }
enum class	PlacerType { SequentialPlacer }
	Placement algorithm type for pass option. More...

Functions
std::unique_ptr< mlir::OperationPass< xilinx::AIE::DeviceOp > >	createConvertAIEToTransactionPass ()
std::unique_ptr< mlir::OperationPass< xilinx::AIE::DeviceOp > >	createConvertAIEToControlPacketsPass ()
std::optional< mlir::ModuleOp >	convertTransactionBinaryToMLIR (mlir::MLIRContext *ctx, std::vector< uint8_t > &binary)
mlir::LogicalResult	generateAndInsertConfigOps (mlir::OpBuilder &builder, xilinx::AIE::DeviceOp device, llvm::StringRef clElfDir="", AIEToConfigurationOutputType outputType=AIEToConfigurationOutputType::Transaction, std::string blockwrite_prefix="config_blockwrite_data_")
bool	hasFlag (ResetTileType value, ResetTileType flag)
mlir::LogicalResult	generateAndInsertResetOps (mlir::OpBuilder &builder, xilinx::AIE::DeviceOp device, ResetConfig dmaConfig, ResetConfig switchConfig, ResetConfig lockConfig, ResetConfig coreConfig, xilinx::AIE::DeviceOp previousDevice)
uint32_t	getShimBurstLengthBytes (const AIE::AIETargetModel &tm, uint32_t burstLength)
uint32_t	getShimBurstLengthEncoding (const AIE::AIETargetModel &tm, uint32_t burstLength)
mlir::LogicalResult	verifyOffsetSizeAndStrideOp (mlir::OffsetSizeAndStrideOpInterface op)
mlir::LogicalResult	myVerifyOffsetSizeAndStrideOp (mlir::OffsetSizeAndStrideOpInterface op)
void	registerAIETranslations ()
WireBundle	getConnectingBundle (WireBundle dir)
bool	operator== (const Port &rhs) const
bool	operator!= (const Port &rhs) const
bool	operator< (const Port &rhs) const
std::ostream &	operator<< (std::ostream &os, const Port &port)
llvm::raw_ostream &	operator<< (llvm::raw_ostream &os, const Port &port)
bool	operator== (const Connect &rhs) const
bool	operator!= (const Connect &rhs) const
bool	operator< (const Connect &rhs) const
bool	operator== (const DMAChannel &rhs) const
const AIETargetModel &	getTargetModel (mlir::Operation *op)
const AIETargetModel &	getTargetModel (AIEDevice device)
mlir::ParseResult	parseObjectFifoProducerTile (mlir::OpAsmParser &parser, mlir::OpAsmParser::UnresolvedOperand &operand, BDDimLayoutArrayAttr &dimensions)
void	printObjectFifoProducerTile (mlir::OpAsmPrinter &printer, mlir::Operation *op, mlir::Value tile, BDDimLayoutArrayAttr dimensions)
mlir::ParseResult	parseObjectFifoConsumerTiles (mlir::OpAsmParser &parser, llvm::SmallVectorImpl< mlir::OpAsmParser::UnresolvedOperand > &tiles, BDDimLayoutArrayArrayAttr &dimensions)
void	printObjectFifoConsumerTiles (mlir::OpAsmPrinter &printer, mlir::Operation *op, mlir::OperandRange tiles, BDDimLayoutArrayArrayAttr dimensions)
int32_t	getBufferBaseAddress (mlir::Operation *bufOp)
mlir::ParseResult	parseTraceEvent (mlir::AsmParser &parser, mlir::Attribute &result)
void	printTraceEventEnum (mlir::AsmPrinter &printer, mlir::Attribute attr)
void	collectTiles (DeviceOp &device, llvm::DenseMap< TileID, mlir::Operation * > &tiles)
void	collectBuffers (DeviceOp &device, llvm::DenseMap< mlir::Operation *, llvm::SmallVector< BufferOp, 4 > > &buffers)
std::string	to_string (const TileID &s)
llvm::raw_ostream &	operator<< (llvm::raw_ostream &os, const TileID &s)
bool	operator< (const TileID &rhs) const
bool	operator== (const TileID &rhs) const
bool	operator!= (const TileID &rhs) const
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEPlaceTilesPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEAssignBufferAddressesPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEAssignBufferAddressesPass (const AIEAssignBufferAddressesOptions &options)
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEAssignCoreLinkFilesPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEAssignLockIDsPass ()
std::unique_ptr< mlir::OperationPass< mlir::ModuleOp > >	createAIECanonicalizeDevicePass ()
std::unique_ptr< mlir::OperationPass< mlir::ModuleOp > >	createAIECoreToStandardPass ()
std::unique_ptr< mlir::OperationPass< mlir::ModuleOp > >	createAIECoreToStandardPass (const AIECoreToStandardOptions &options)
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEFindFlowsPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIELocalizeLocksPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIENormalizeAddressSpacesPass ()
std::unique_ptr< mlir::OperationPass< mlir::ModuleOp > >	createAIERouteFlowsPass ()
std::unique_ptr< mlir::OperationPass< mlir::func::FuncOp > >	createAIEVectorOptPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEVectorToPointerLoopsPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEVectorTransferLoweringPass ()
std::unique_ptr< mlir::OperationPass< mlir::ModuleOp > >	createAIEHoistVectorTransferPointersPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEPathfinderPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEObjectFifoStatefulTransformPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEObjectFifoRegisterProcessPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIELowerCascadeFlowsPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEAssignBufferDescriptorIDsPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEGenerateColumnControlOverlayPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEGenerateColumnControlOverlayPass (const AIEGenerateColumnControlOverlayOptions &options)
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEAssignTileCtrlIDsPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIETraceToConfigPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIETraceRegPackWritesPass ()
std::unique_ptr< mlir::OperationPass< DeviceOp > >	createAIEInsertTraceFlowsPass ()
	SwitchboxConnect (TileID coords)
	SwitchboxConnect (TileID srcCoords, TileID dstCoords)
void	resize ()
void	updateDemand ()
void	bumpDemand (size_t i, size_t j)
	PathEndPoint (TileID coords, Port port)
std::ostream &	operator<< (std::ostream &os, const PathEndPoint &s)
llvm::raw_ostream &	operator<< (llvm::raw_ostream &os, const PathEndPoint &s)
bool	operator< (const PathEndPoint &rhs) const
bool	operator== (const PathEndPoint &rhs) const
	SwitchSetting (std::vector< Port > srcs)
	SwitchSetting (std::vector< Port > srcs, std::vector< Port > dsts)
std::ostream &	operator<< (std::ostream &os, const SwitchSetting &setting)
llvm::raw_ostream &	operator<< (llvm::raw_ostream &os, const SwitchSetting &s)
bool	operator< (const SwitchSetting &rhs) const
int	getWireBundleAsInt (WireBundle bundle)
mlir::LogicalResult	AIETranslateToXAIEV2 (mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName="")
mlir::LogicalResult	AIETranslateToHSA (mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName="")
mlir::LogicalResult	AIEFlowsToJSON (mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName="")
mlir::LogicalResult	ADFGenerateCPPGraph (mlir::ModuleOp module, llvm::raw_ostream &output)
mlir::LogicalResult	AIETranslateSCSimConfig (mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName="")
mlir::LogicalResult	AIETranslateShimSolution (mlir::ModuleOp module, llvm::raw_ostream &, llvm::StringRef deviceName="")
mlir::LogicalResult	AIETranslateGraphXPE (mlir::ModuleOp module, llvm::raw_ostream &, llvm::StringRef)
mlir::LogicalResult	AIETranslateNpuToBinary (mlir::ModuleOp, std::vector< uint32_t > &, llvm::StringRef deviceName="", llvm::StringRef sequenceName="")
mlir::LogicalResult	AIETranslateToUcDma (mlir::ModuleOp module, llvm::raw_ostream &output)
mlir::LogicalResult	AIETranslateToUcDma (mlir::ModuleOp, std::string &assembly)
mlir::LogicalResult	AIETranslateControlPacketsToUI32Vec (mlir::ModuleOp, std::vector< uint32_t > &, llvm::StringRef deviceName="", llvm::StringRef sequenceName="")
mlir::LogicalResult	AIETranslateToLdScript (mlir::ModuleOp module, llvm::raw_ostream &output, int tileCol, int tileRow, llvm::StringRef deviceName="")
mlir::LogicalResult	AIETranslateToBCF (mlir::ModuleOp module, llvm::raw_ostream &output, int tileCol, int tileRow, llvm::StringRef deviceName="")
mlir::LogicalResult	AIELLVMLink (llvm::raw_ostream &output, std::vector< std::string > Files, bool DisableDITypeMap=false, bool NoVerify=false, bool Internalize=false, bool OnlyNeeded=false, bool PreserveAssemblyUseListOrder=false, bool Verbose=false)
mlir::LogicalResult	AIETranslateToCDODirect (mlir::ModuleOp m, llvm::StringRef workDirPath, llvm::StringRef deviceName, bool bigEndian=false, bool emitUnified=false, bool cdoDebug=false, bool aieSim=false, bool xaieDebug=false, bool enableCores=true)
mlir::LogicalResult	AIETranslateToTargetArch (mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName)
std::string	tileLocStr (llvm::StringRef col, llvm::StringRef row)
std::string	tileLocStr (int col, int row)
std::string	tileDMAInstStr (llvm::StringRef col, llvm::StringRef row, llvm::StringRef bdNum)
std::string	tileDMAInstStr (int col, int row, int bdNum)
std::string	tileDMAInstRefStr (llvm::StringRef col, llvm::StringRef row, llvm::StringRef bdNum)
std::string	tileDMAInstRefStr (int col, int row, int bdNum)
std::string	packetStr (llvm::StringRef id, llvm::StringRef type)
std::string	packetStr (int id, int type)
void	generateXAieDmaSetMultiDimAddr (llvm::raw_ostream &output, int ndims, llvm::ArrayRef< BDDimLayoutAttr > dims, int col, int row, int bdNum, int baseAddrA, int offsetA, int lenA, int elementWidthInBytes, const char *errorRet)
llvm::SetVector< mlir::Block * >	getOrderedChainOfBlocks (mlir::Region *region)
TileID	getNextCoords (int col, int row, WireBundle bundle)
void	translateSwitchboxes (DeviceOp targetOp, raw_ostream &output)
void	translateCircuitFlows (DeviceOp targetOp, int &flowCount, raw_ostream &output)
void	translatePacketFlows (DeviceOp targetOp, int &flowCount, raw_ostream &output)
mlir::LogicalResult	AIEFlowsToJSON (ModuleOp module, raw_ostream &output, llvm::StringRef deviceName)
LogicalResult	AIETranslateToBCF (ModuleOp module, raw_ostream &output, int tileCol, int tileRow, llvm::StringRef deviceName)
mlir::LogicalResult	AIETranslateToHSA (ModuleOp module, raw_ostream &output, llvm::StringRef deviceName)
void	writeBufferMap (raw_ostream &output, BufferOp buf, int offset)
LogicalResult	AIETranslateToTargetArch (ModuleOp module, raw_ostream &output, llvm::StringRef deviceName)
std::string	tileLocStr (StringRef col, StringRef row)
std::string	tileDMAInstStr (StringRef col, StringRef row, StringRef bdNum)
std::string	tileDMAInstRefStr (StringRef col, StringRef row, StringRef bdNum)
std::string	packetStr (StringRef id, StringRef type)
void	generateXAieDmaSetMultiDimAddr (raw_ostream &output, int ndims, ArrayRef< BDDimLayoutAttr > dims, int col, int row, int bdNum, int baseAddrA, int offsetA, int lenA, int elementWidthInBytes, const char *errorRetval)
llvm::SetVector< Block * >	getOrderedChainOfBlocks (Region *region)

Variables
int	channel
Port	dst
return	os
int	col
int	row
TileID	srcCoords
TileID	dstCoords
std::vector< Port >	srcPorts
std::vector< Port >	dstPorts
std::vector< std::vector< Connectivity > >	connectivity
std::vector< std::vector< double > >	demand
std::vector< std::vector< int > >	overCapacity
std::vector< std::vector< int > >	usedCapacity
std::vector< std::vector< int > >	packetFlowCount
std::vector< std::vector< int > >	packetGroupId
std::vector< std::vector< bool > >	isPriority
TileID	coords
Port	port
bool	isPriorityFlow
PathEndPoint	src
std::vector< PathEndPoint >	dsts
std::vector< Port >	srcs
const char *	hsa_cpp_file_header

Detailed Description

Include the generated interface declarations.

Typedef Documentation

Connect

using xilinx::AIE::Connect = typedef Connect { Port src

Definition at line 157 of file AIEDialect.h.

DMAChannel

using xilinx::AIE::DMAChannel = typedef DMAChannel { DMAChannelDir direction

Definition at line 172 of file AIEDialect.h.

Flow

using xilinx::AIE::Flow = typedef Flow { int packetGroupId

Definition at line 125 of file AIEPathFinder.h.

PathEndPoint

using xilinx::AIE::PathEndPoint = typedef PathEndPoint { PathEndPoint() = default

Definition at line 95 of file AIEPathFinder.h.

PlacementResult

using xilinx::AIE::PlacementResult = typedef llvm::DenseMap<mlir::Operation *, TileID>

Definition at line 23 of file AIEPlacer.h.

Port

using xilinx::AIE::Port = typedef Port { WireBundle bundle

Definition at line 127 of file AIEDialect.h.

SwitchboxConnect

using xilinx::AIE::SwitchboxConnect = typedef SwitchboxConnect { SwitchboxConnect() = default

Definition at line 33 of file AIEPathFinder.h.

SwitchSetting

using xilinx::AIE::SwitchSetting = typedef SwitchSetting { SwitchSetting() = default

Definition at line 135 of file AIEPathFinder.h.

SwitchSettings

using xilinx::AIE::SwitchSettings = typedef std::map<TileID, SwitchSetting>

Definition at line 180 of file AIEPathFinder.h.

TileID

using xilinx::AIE::TileID = typedef TileID { friend std::ostream &operator<<(std::ostream &os, const TileID &s) { os << "TileID(" << s.col << ", " << s.row << ")"

Definition at line 25 of file AIETargetModel.h.

Enumeration Type Documentation

AIEToConfigurationOutputType

enum xilinx::AIE::AIEToConfigurationOutputType

Enumerator
Transaction
ControlPacket

Definition at line 27 of file AIEToConfiguration.h.

Connectivity

enum class xilinx::AIE::Connectivity

strong

Enumerator
INVALID
AVAILABLE

Definition at line 31 of file AIEPathFinder.h.

PlacerType

enum class xilinx::AIE::PlacerType

strong

Placement algorithm type for pass option.

Enumerator
SequentialPlacer

Definition at line 20 of file AIEPlacer.h.

ResetMode

enum class xilinx::AIE::ResetMode

strong

Enumerator
Never
IfUsed
IfUsedFineGrained
IfChanged
IfChangedFineGrained
Always

Definition at line 69 of file AIEToConfiguration.h.

ResetTileType

enum class xilinx::AIE::ResetTileType : unsigned

strong

Enumerator
None
ShimNOC
MemTile
CoreTile
All

Definition at line 56 of file AIEToConfiguration.h.

Function Documentation

ADFGenerateCPPGraph()

mlir::LogicalResult xilinx::AIE::ADFGenerateCPPGraph	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output
	)

AIEFlowsToJSON() [1/2]

mlir::LogicalResult xilinx::AIE::AIEFlowsToJSON	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		llvm::StringRef	deviceName = ""
	)

AIEFlowsToJSON() [2/2]

mlir::LogicalResult xilinx::AIE::AIEFlowsToJSON	(	ModuleOp	module,
		raw_ostream &	output,
		llvm::StringRef	deviceName
	)

Definition at line 425 of file AIEFlowsToJSON.cpp.

References translateCircuitFlows(), translatePacketFlows(), and translateSwitchboxes().

AIELLVMLink()

mlir::LogicalResult xilinx::AIE::AIELLVMLink	(	llvm::raw_ostream &	output,
		std::vector< std::string >	Files,
		bool	DisableDITypeMap = false,
		bool	NoVerify = false,
		bool	Internalize = false,
		bool	OnlyNeeded = false,
		bool	PreserveAssemblyUseListOrder = false,
		bool	Verbose = false
	)

Definition at line 123 of file AIELLVMLink.cpp.

References linkFiles().

Referenced by aieLLVMLink().

AIETranslateControlPacketsToUI32Vec()

mlir::LogicalResult xilinx::AIE::AIETranslateControlPacketsToUI32Vec	(	mlir::ModuleOp	,
		std::vector< uint32_t > &	,
		llvm::StringRef	deviceName = "",
		llvm::StringRef	sequenceName = ""
	)

Referenced by aieTranslateControlPacketsToUI32Vec().

AIETranslateGraphXPE()

mlir::LogicalResult xilinx::AIE::AIETranslateGraphXPE	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		llvm::StringRef	deviceName
	)

Definition at line 216 of file AIETargetSimulationFiles.cpp.

References col, and row.

AIETranslateNpuToBinary()

mlir::LogicalResult xilinx::AIE::AIETranslateNpuToBinary	(	mlir::ModuleOp	,
		std::vector< uint32_t > &	,
		llvm::StringRef	deviceName = "",
		llvm::StringRef	sequenceName = ""
	)

Referenced by aieTranslateNpuToBinary().

AIETranslateSCSimConfig()

mlir::LogicalResult xilinx::AIE::AIETranslateSCSimConfig	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		llvm::StringRef	deviceName = ""
	)

Definition at line 23 of file AIETargetSimulationFiles.cpp.

AIETranslateShimSolution()

mlir::LogicalResult xilinx::AIE::AIETranslateShimSolution	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		llvm::StringRef	deviceName = ""
	)

Definition at line 156 of file AIETargetSimulationFiles.cpp.

References channel, and col.

AIETranslateToBCF() [1/2]

mlir::LogicalResult xilinx::AIE::AIETranslateToBCF	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		int	tileCol,
		int	tileRow,
		llvm::StringRef	deviceName = ""
	)

Referenced by aieTranslateToBCF().

AIETranslateToBCF() [2/2]

LogicalResult xilinx::AIE::AIETranslateToBCF	(	ModuleOp	module,
		raw_ostream &	output,
		int	tileCol,
		int	tileRow,
		llvm::StringRef	deviceName
	)

Definition at line 30 of file AIETargetBCF.cpp.

References collectBuffers(), collectTiles(), getBufferBaseAddress(), getTargetModel(), and utohexstr().

AIETranslateToCDODirect()

mlir::LogicalResult xilinx::AIE::AIETranslateToCDODirect	(	mlir::ModuleOp	m,
		llvm::StringRef	workDirPath,
		llvm::StringRef	deviceName,
		bool	bigEndian = false,
		bool	emitUnified = false,
		bool	cdoDebug = false,
		bool	aieSim = false,
		bool	xaieDebug = false,
		bool	enableCores = true
	)

Referenced by aieTranslateToCDODirect().

AIETranslateToHSA() [1/2]

mlir::LogicalResult xilinx::AIE::AIETranslateToHSA	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		llvm::StringRef	deviceName = ""
	)

Referenced by aieTranslateToHSA().

AIETranslateToHSA() [2/2]

mlir::LogicalResult xilinx::AIE::AIETranslateToHSA	(	ModuleOp	module,
		raw_ostream &	output,
		llvm::StringRef	deviceName
	)

Definition at line 45 of file AIETargetHSA.cpp.

References col, collectBuffers(), collectTiles(), and hsa_cpp_file_header.

AIETranslateToLdScript()

mlir::LogicalResult xilinx::AIE::AIETranslateToLdScript	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		int	tileCol,
		int	tileRow,
		llvm::StringRef	deviceName = ""
	)

AIETranslateToTargetArch() [1/2]

mlir::LogicalResult xilinx::AIE::AIETranslateToTargetArch	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		llvm::StringRef	deviceName
	)

AIETranslateToTargetArch() [2/2]

LogicalResult xilinx::AIE::AIETranslateToTargetArch	(	ModuleOp	module,
		raw_ostream &	output,
		llvm::StringRef	deviceName
	)

Definition at line 112 of file AIETargets.cpp.

AIETranslateToUcDma() [1/2]

mlir::LogicalResult xilinx::AIE::AIETranslateToUcDma	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output
	)

AIETranslateToUcDma() [2/2]

mlir::LogicalResult xilinx::AIE::AIETranslateToUcDma	(	mlir::ModuleOp	,
		std::string &	assembly
	)

AIETranslateToXAIEV2()

mlir::LogicalResult xilinx::AIE::AIETranslateToXAIEV2	(	mlir::ModuleOp	module,
		llvm::raw_ostream &	output,
		llvm::StringRef	deviceName = ""
	)

Referenced by aieTranslateToXAIEV2().

bumpDemand()

void xilinx::AIE::bumpDemand	(	size_t	i,
		size_t	j
	)

Definition at line 87 of file AIEPathFinder.h.

References demand, DEMAND_COEFF, isPriority, MAX_CIRCUIT_STREAM_CAPACITY, and usedCapacity.

collectBuffers()

void xilinx::AIE::collectBuffers	(	DeviceOp &	device,
		llvm::DenseMap< mlir::Operation *, llvm::SmallVector< BufferOp, 4 > > &	buffers
	)

Referenced by AIETranslateToBCF(), AIETranslateToHSA(), and registerAIETranslations().

collectTiles()

void xilinx::AIE::collectTiles	(	DeviceOp &	device,
		llvm::DenseMap< TileID, mlir::Operation * > &	tiles
	)

Referenced by AIETranslateToBCF(), AIETranslateToHSA(), and registerAIETranslations().

convertTransactionBinaryToMLIR()

std::optional< mlir::ModuleOp > xilinx::AIE::convertTransactionBinaryToMLIR	(	mlir::MLIRContext *	ctx,
		std::vector< uint8_t > &	binary
	)

Definition at line 699 of file AIEToConfiguration.cpp.

Referenced by aieTranslateBinaryToTxn().

createAIEAssignBufferAddressesPass() [1/2]

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEAssignBufferAddressesPass

(

)

Definition at line 540 of file AIEAssignBuffers.cpp.

createAIEAssignBufferAddressesPass() [2/2]

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEAssignBufferAddressesPass

(

const AIEAssignBufferAddressesOptions &

options

)

Definition at line 545 of file AIEAssignBuffers.cpp.

createAIEAssignBufferDescriptorIDsPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEAssignBufferDescriptorIDsPass

(

)

Definition at line 207 of file AIEAssignBufferDescriptorIDs.cpp.

createAIEAssignCoreLinkFilesPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEAssignCoreLinkFilesPass

(

)

Definition at line 121 of file AIEAssignCoreLinkFiles.cpp.

createAIEAssignLockIDsPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEAssignLockIDsPass

(

)

Definition at line 107 of file AIEAssignLockIDs.cpp.

createAIEAssignTileCtrlIDsPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEAssignTileCtrlIDsPass

(

)

Definition at line 408 of file AIEGenerateColumnControlOverlay.cpp.

createAIECanonicalizeDevicePass()

std::unique_ptr< OperationPass< ModuleOp > > xilinx::AIE::createAIECanonicalizeDevicePass

(

)

Definition at line 63 of file AIECanonicalizeDevice.cpp.

createAIECoreToStandardPass() [1/2]

std::unique_ptr< OperationPass< ModuleOp > > xilinx::AIE::createAIECoreToStandardPass

(

)

Definition at line 802 of file AIECoreToStandard.cpp.

createAIECoreToStandardPass() [2/2]

std::unique_ptr< OperationPass< ModuleOp > > xilinx::AIE::createAIECoreToStandardPass

(

const AIECoreToStandardOptions &

options

)

Definition at line 807 of file AIECoreToStandard.cpp.

createAIEFindFlowsPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEFindFlowsPass

(

)

Definition at line 292 of file AIEFindFlows.cpp.

createAIEGenerateColumnControlOverlayPass() [1/2]

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEGenerateColumnControlOverlayPass

(

)

Definition at line 413 of file AIEGenerateColumnControlOverlay.cpp.

createAIEGenerateColumnControlOverlayPass() [2/2]

std::unique_ptr< mlir::OperationPass< DeviceOp > > xilinx::AIE::createAIEGenerateColumnControlOverlayPass

(

const AIEGenerateColumnControlOverlayOptions &

options

)

createAIEHoistVectorTransferPointersPass()

std::unique_ptr< OperationPass< ModuleOp > > xilinx::AIE::createAIEHoistVectorTransferPointersPass

(

)

Definition at line 590 of file AIEHoistVectorTransferPointers.cpp.

createAIEInsertTraceFlowsPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEInsertTraceFlowsPass

(

)

Definition at line 617 of file AIEInsertTraceFlows.cpp.

createAIELocalizeLocksPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIELocalizeLocksPass

(

)

Definition at line 94 of file AIELocalizeLocks.cpp.

createAIELowerCascadeFlowsPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIELowerCascadeFlowsPass

(

)

Definition at line 99 of file AIELowerCascadeFlows.cpp.

createAIENormalizeAddressSpacesPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIENormalizeAddressSpacesPass

(

)

Definition at line 88 of file AIENormalizeAddressSpaces.cpp.

createAIEObjectFifoRegisterProcessPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEObjectFifoRegisterProcessPass

(

)

Definition at line 236 of file AIEObjectFifoRegisterProcess.cpp.

createAIEObjectFifoStatefulTransformPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEObjectFifoStatefulTransformPass

(

)

Definition at line 2482 of file AIEObjectFifoStatefulTransform.cpp.

createAIEPathfinderPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEPathfinderPass

(

)

Definition at line 1142 of file AIECreatePathFindFlows.cpp.

createAIEPlaceTilesPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEPlaceTilesPass

(

)

Definition at line 96 of file AIEPlaceTiles.cpp.

createAIERouteFlowsPass()

std::unique_ptr< mlir::OperationPass< mlir::ModuleOp > > xilinx::AIE::createAIERouteFlowsPass

(

)

createAIETraceRegPackWritesPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIETraceRegPackWritesPass

(

)

Definition at line 692 of file AIETraceToConfig.cpp.

createAIETraceToConfigPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIETraceToConfigPass

(

)

Definition at line 436 of file AIETraceToConfig.cpp.

createAIEVectorOptPass()

std::unique_ptr< OperationPass< func::FuncOp > > xilinx::AIE::createAIEVectorOptPass

(

)

Definition at line 62 of file AIEVectorOpt.cpp.

createAIEVectorToPointerLoopsPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEVectorToPointerLoopsPass

(

)

Definition at line 413 of file AIEVectorToPointerLoops.cpp.

createAIEVectorTransferLoweringPass()

std::unique_ptr< OperationPass< DeviceOp > > xilinx::AIE::createAIEVectorTransferLoweringPass

(

)

Definition at line 73 of file AIEVectorTransferLowering.cpp.

createConvertAIEToControlPacketsPass()

std::unique_ptr< mlir::OperationPass< xilinx::AIE::DeviceOp > > xilinx::AIE::createConvertAIEToControlPacketsPass

(

)

Definition at line 883 of file AIEToConfiguration.cpp.

createConvertAIEToTransactionPass()

std::unique_ptr< mlir::OperationPass< xilinx::AIE::DeviceOp > > xilinx::AIE::createConvertAIEToTransactionPass

(

)

Definition at line 878 of file AIEToConfiguration.cpp.

generateAndInsertConfigOps()

mlir::LogicalResult xilinx::AIE::generateAndInsertConfigOps	(	mlir::OpBuilder &	builder,
		xilinx::AIE::DeviceOp	device,
		llvm::StringRef	clElfDir = "",
		AIEToConfigurationOutputType	outputType = AIEToConfigurationOutputType::Transaction,
		std::string	blockwrite_prefix = "config_blockwrite_data_"
	)

generateAndInsertResetOps()

mlir::LogicalResult xilinx::AIE::generateAndInsertResetOps	(	mlir::OpBuilder &	builder,
		xilinx::AIE::DeviceOp	device,
		ResetConfig	dmaConfig,
		ResetConfig	switchConfig,
		ResetConfig	lockConfig,
		ResetConfig	coreConfig,
		xilinx::AIE::DeviceOp	previousDevice
	)

generateXAieDmaSetMultiDimAddr() [1/2]

void xilinx::AIE::generateXAieDmaSetMultiDimAddr	(	llvm::raw_ostream &	output,
		int	ndims,
		llvm::ArrayRef< BDDimLayoutAttr >	dims,
		int	col,
		int	row,
		int	bdNum,
		int	baseAddrA,
		int	offsetA,
		int	lenA,
		int	elementWidthInBytes,
		const char *	errorRet
	)

generateXAieDmaSetMultiDimAddr() [2/2]

void xilinx::AIE::generateXAieDmaSetMultiDimAddr	(	raw_ostream &	output,
		int	ndims,
		ArrayRef< BDDimLayoutAttr >	dims,
		int	col,
		int	row,
		int	bdNum,
		int	baseAddrA,
		int	offsetA,
		int	lenA,
		int	elementWidthInBytes,
		const char *	errorRetval
	)

Definition at line 86 of file AIETargetShared.cpp.

References col, row, and tileDMAInstRefStr().

getBufferBaseAddress()

int32_t xilinx::AIE::getBufferBaseAddress

(

mlir::Operation *

bufOp

)

Referenced by AIETranslateToBCF(), and writeBufferMap().

getConnectingBundle()

WireBundle xilinx::AIE::getConnectingBundle

(

WireBundle

dir

)

Definition at line 2701 of file AIEDialect.cpp.

Referenced by xilinx::AIE::Pathfinder::dijkstraShortestPaths(), translateCircuitFlows(), and translatePacketFlows().

getNextCoords()

TileID xilinx::AIE::getNextCoords	(	int	col,
		int	row,
		WireBundle	bundle
	)

Definition at line 34 of file AIEFlowsToJSON.cpp.

References col, and row.

Referenced by translateCircuitFlows(), and translatePacketFlows().

getOrderedChainOfBlocks() [1/2]

llvm::SetVector< mlir::Block * > xilinx::AIE::getOrderedChainOfBlocks

(

mlir::Region *

region

)

Referenced by xilinx::AIE::AIERTControl::addInitConfig().

getOrderedChainOfBlocks() [2/2]

llvm::SetVector< Block * > xilinx::AIE::getOrderedChainOfBlocks

(

Region *

region

)

Definition at line 136 of file AIETargetShared.cpp.

getShimBurstLengthBytes()

uint32_t xilinx::AIE::getShimBurstLengthBytes	(	const AIE::AIETargetModel &	tm,
		uint32_t	burstLength
	)

Definition at line 118 of file AIEDialect.cpp.

Referenced by configureBdInBlock().

getShimBurstLengthEncoding()

uint32_t xilinx::AIE::getShimBurstLengthEncoding	(	const AIE::AIETargetModel &	tm,
		uint32_t	burstLength
	)

Definition at line 124 of file AIEDialect.cpp.

getTargetModel() [1/2]

const AIETargetModel & xilinx::AIE::getTargetModel

(

AIEDevice

device

)

Definition at line 187 of file AIEDialect.cpp.

getTargetModel() [2/2]

const AIETargetModel & xilinx::AIE::getTargetModel

(

mlir::Operation *

op

)

Referenced by aieGetTargetModel(), AIETranslateToBCF(), basicAllocation(), DMAChannelAnalysis::getDMAChannelIndex(), AIEAssignRuntimeSequenceBDIDsPass::getGeneratorForTile(), LockAnalysis::getLockID(), xilinx::AIEX::TokenAnalysis::getShareableTileOp(), AIEObjectFifoStatefulTransformPass::isSharedMemory(), registerAIETranslations(), AIEDMATasksToNPUPass::rewriteSingleBD(), AIELocalizeLocksPass::runOnOperation(), AIEDMATasksToNPUPass::setAddressForSingleBD(), simpleBankAwareAllocation(), xilinx::AIEX::verifyStridesWraps(), and xilinx::AIE::HasValidBDs< ConcreteType >::verifyTrait().

getWireBundleAsInt()

int xilinx::AIE::getWireBundleAsInt

(

WireBundle

bundle

)

Definition at line 694 of file AIEPathFinder.cpp.

hasFlag()

bool xilinx::AIE::hasFlag ( ResetTileType  value, ResetTileType  flag  )

inline

Definition at line 64 of file AIEToConfiguration.h.

myVerifyOffsetSizeAndStrideOp()

LogicalResult xilinx::AIE::myVerifyOffsetSizeAndStrideOp

(

mlir::OffsetSizeAndStrideOpInterface

op

)

Definition at line 131 of file AIEDialect.cpp.

Referenced by xilinx::AIE::MyOffsetSizeAndStrideOpInterfaceTrait< ConcreteOp >::verifyTrait().

operator!=() [1/3]

bool xilinx::AIE::operator!=

(

const Connect &

rhs

)

const

Definition at line 165 of file AIEDialect.h.

operator!=() [2/3]

bool xilinx::AIE::operator!=

(

const Port &

rhs

)

const

Definition at line 135 of file AIEDialect.h.

operator!=() [3/3]

bool xilinx::AIE::operator!=

(

const TileID &

rhs

)

const

Definition at line 53 of file AIETargetModel.h.

operator<() [1/5]

bool xilinx::AIE::operator<

(

const Connect &

rhs

)

const

Definition at line 167 of file AIEDialect.h.

References dst, and src.

operator<() [2/5]

bool xilinx::AIE::operator<

(

const PathEndPoint &

rhs

)

const

Definition at line 116 of file AIEPathFinder.h.

References coords, and port.

operator<() [3/5]

bool xilinx::AIE::operator<

(

const Port &

rhs

)

const

Definition at line 137 of file AIEDialect.h.

References channel.

operator<() [4/5]

bool xilinx::AIE::operator<

(

const SwitchSetting &

rhs

)

const

Definition at line 177 of file AIEPathFinder.h.

References srcs.

operator<() [5/5]

bool xilinx::AIE::operator< ( const TileID &  rhs ) const

inline

Definition at line 45 of file AIETargetModel.h.

References col, and row.

operator<<() [1/7]

friend llvm::raw_ostream & xilinx::AIE::operator<<	(	llvm::raw_ostream &	os,
		const PathEndPoint &	s
	)

Definition at line 109 of file AIEPathFinder.h.

References os, and to_string().

operator<<() [2/7]

friend llvm::raw_ostream & xilinx::AIE::operator<<	(	llvm::raw_ostream &	os,
		const Port &	port
	)

Definition at line 150 of file AIEDialect.h.

References os, port, and to_string().

operator<<() [3/7]

friend llvm::raw_ostream & xilinx::AIE::operator<<	(	llvm::raw_ostream &	os,
		const SwitchSetting &	s
	)

Definition at line 171 of file AIEPathFinder.h.

References os, and to_string().

operator<<() [4/7]

friend llvm::raw_ostream & xilinx::AIE::operator<<	(	llvm::raw_ostream &	os,
		const TileID &	s
	)

Definition at line 39 of file AIETargetModel.h.

References os, and to_string().

operator<<() [5/7]

friend std::ostream & xilinx::AIE::operator<<	(	std::ostream &	os,
		const PathEndPoint &	s
	)

Definition at line 102 of file AIEPathFinder.h.

References os.

operator<<() [6/7]

friend std::ostream & xilinx::AIE::operator<<	(	std::ostream &	os,
		const Port &	port
	)

Definition at line 141 of file AIEDialect.h.

References os, and port.

operator<<() [7/7]

friend std::ostream & xilinx::AIE::operator<<	(	std::ostream &	os,
		const SwitchSetting &	setting
	)

Definition at line 146 of file AIEPathFinder.h.

References os, and port.

operator==() [1/5]

bool xilinx::AIE::operator==

(

const Connect &

rhs

)

const

Definition at line 161 of file AIEDialect.h.

References dst, and src.

operator==() [2/5]

bool xilinx::AIE::operator==

(

const DMAChannel &

rhs

)

const

Definition at line 176 of file AIEDialect.h.

References channel.

operator==() [3/5]

bool xilinx::AIE::operator==

(

const PathEndPoint &

rhs

)

const

Definition at line 120 of file AIEPathFinder.h.

References coords, and port.

operator==() [4/5]

bool xilinx::AIE::operator==

(

const Port &

rhs

)

const

Definition at line 131 of file AIEDialect.h.

References channel.

operator==() [5/5]

bool xilinx::AIE::operator==

(

const TileID &

rhs

)

const

Definition at line 49 of file AIETargetModel.h.

References col, and row.

packetStr() [1/3]

std::string xilinx::AIE::packetStr	(	int	id,
		int	type
	)

Definition at line 69 of file AIETargetShared.cpp.

References packetStr().

packetStr() [2/3]

std::string xilinx::AIE::packetStr	(	llvm::StringRef	id,
		llvm::StringRef	type
	)

Referenced by packetStr().

packetStr() [3/3]

std::string xilinx::AIE::packetStr	(	StringRef	id,
		StringRef	type
	)

Definition at line 62 of file AIETargetShared.cpp.

parseObjectFifoConsumerTiles()

mlir::ParseResult xilinx::AIE::parseObjectFifoConsumerTiles	(	mlir::OpAsmParser &	parser,
		llvm::SmallVectorImpl< mlir::OpAsmParser::UnresolvedOperand > &	tiles,
		BDDimLayoutArrayArrayAttr &	dimensions
	)

parseObjectFifoProducerTile()

mlir::ParseResult xilinx::AIE::parseObjectFifoProducerTile	(	mlir::OpAsmParser &	parser,
		mlir::OpAsmParser::UnresolvedOperand &	operand,
		BDDimLayoutArrayAttr &	dimensions
	)

parseTraceEvent()

mlir::ParseResult xilinx::AIE::parseTraceEvent	(	mlir::AsmParser &	parser,
		mlir::Attribute &	result
	)

PathEndPoint()

xilinx::AIE::PathEndPoint	(	TileID	coords,
		Port	port
	)

Definition at line 97 of file AIEPathFinder.h.

printObjectFifoConsumerTiles()

void xilinx::AIE::printObjectFifoConsumerTiles	(	mlir::OpAsmPrinter &	printer,
		mlir::Operation *	op,
		mlir::OperandRange	tiles,
		BDDimLayoutArrayArrayAttr	dimensions
	)

printObjectFifoProducerTile()

void xilinx::AIE::printObjectFifoProducerTile	(	mlir::OpAsmPrinter &	printer,
		mlir::Operation *	op,
		mlir::Value	tile,
		BDDimLayoutArrayAttr	dimensions
	)

printTraceEventEnum()

void xilinx::AIE::printTraceEventEnum	(	mlir::AsmPrinter &	printer,
		mlir::Attribute	attr
	)

registerAIETranslations()

void xilinx::AIE::registerAIETranslations

(

)

Definition at line 126 of file AIETargets.cpp.

References collectBuffers(), collectTiles(), getTargetModel(), and writeBufferMap().

resize()

void xilinx::AIE::resize

(

)

Definition at line 58 of file AIEPathFinder.h.

References connectivity, demand, dstPorts, INVALID, isPriority, overCapacity, packetFlowCount, packetGroupId, srcPorts, and usedCapacity.

SwitchboxConnect() [1/2]

xilinx::AIE::SwitchboxConnect

(

TileID

coords

)

Definition at line 35 of file AIEPathFinder.h.

SwitchboxConnect() [2/2]

xilinx::AIE::SwitchboxConnect	(	TileID	srcCoords,
		TileID	dstCoords
	)

Definition at line 36 of file AIEPathFinder.h.

SwitchSetting() [1/2]

xilinx::AIE::SwitchSetting

(

std::vector< Port >

srcs

)

Definition at line 137 of file AIEPathFinder.h.

SwitchSetting() [2/2]

xilinx::AIE::SwitchSetting	(	std::vector< Port >	srcs,
		std::vector< Port >	dsts
	)

Definition at line 138 of file AIEPathFinder.h.

tileDMAInstRefStr() [1/3]

std::string xilinx::AIE::tileDMAInstRefStr	(	int	col,
		int	row,
		int	bdNum
	)

Definition at line 57 of file AIETargetShared.cpp.

References col, row, and tileDMAInstRefStr().

tileDMAInstRefStr() [2/3]

std::string xilinx::AIE::tileDMAInstRefStr	(	llvm::StringRef	col,
		llvm::StringRef	row,
		llvm::StringRef	bdNum
	)

Referenced by generateXAieDmaSetMultiDimAddr(), and tileDMAInstRefStr().

tileDMAInstRefStr() [3/3]

std::string xilinx::AIE::tileDMAInstRefStr	(	StringRef	col,
		StringRef	row,
		StringRef	bdNum
	)

Definition at line 50 of file AIETargetShared.cpp.

References col, row, and tileDMAInstStr().

tileDMAInstStr() [1/3]

std::string xilinx::AIE::tileDMAInstStr	(	int	col,
		int	row,
		int	bdNum
	)

Definition at line 45 of file AIETargetShared.cpp.

References col, row, and tileDMAInstStr().

tileDMAInstStr() [2/3]

std::string xilinx::AIE::tileDMAInstStr	(	llvm::StringRef	col,
		llvm::StringRef	row,
		llvm::StringRef	bdNum
	)

Referenced by tileDMAInstRefStr(), and tileDMAInstStr().

tileDMAInstStr() [3/3]

std::string xilinx::AIE::tileDMAInstStr	(	StringRef	col,
		StringRef	row,
		StringRef	bdNum
	)

Definition at line 38 of file AIETargetShared.cpp.

References col, and row.

tileLocStr() [1/3]

std::string xilinx::AIE::tileLocStr	(	int	col,
		int	row
	)

Definition at line 34 of file AIETargetShared.cpp.

References col, row, and tileLocStr().

tileLocStr() [2/3]

std::string xilinx::AIE::tileLocStr	(	llvm::StringRef	col,
		llvm::StringRef	row
	)

Referenced by tileLocStr().

tileLocStr() [3/3]

std::string xilinx::AIE::tileLocStr	(	StringRef	col,
		StringRef	row
	)

Definition at line 27 of file AIETargetShared.cpp.

References col, and row.

to_string()

friend std::string xilinx::AIE::to_string

(

const TileID &

s

)

Definition at line 33 of file AIETargetModel.h.

Referenced by operator<<(), operator<<(), operator<<(), and operator<<().

translateCircuitFlows()

void xilinx::AIE::translateCircuitFlows	(	DeviceOp	targetOp,
		int &	flowCount,
		raw_ostream &	output
	)

Definition at line 156 of file AIEFlowsToJSON.cpp.

References getConnectingBundle(), and getNextCoords().

Referenced by AIEFlowsToJSON().

translatePacketFlows()

void xilinx::AIE::translatePacketFlows	(	DeviceOp	targetOp,
		int &	flowCount,
		raw_ostream &	output
	)

Definition at line 276 of file AIEFlowsToJSON.cpp.

References getConnectingBundle(), and getNextCoords().

Referenced by AIEFlowsToJSON().

translateSwitchboxes()

void xilinx::AIE::translateSwitchboxes	(	DeviceOp	targetOp,
		raw_ostream &	output
	)

Definition at line 49 of file AIEFlowsToJSON.cpp.

References col, port, and row.

Referenced by AIEFlowsToJSON().

updateDemand()

void xilinx::AIE::updateDemand

(

)

Definition at line 73 of file AIEPathFinder.h.

References demand, DEMAND_BASE, dstPorts, OVER_CAPACITY_COEFF, overCapacity, srcPorts, USED_CAPACITY_COEFF, and usedCapacity.

verifyOffsetSizeAndStrideOp()

mlir::LogicalResult xilinx::AIE::verifyOffsetSizeAndStrideOp

(

mlir::OffsetSizeAndStrideOpInterface

op

)

writeBufferMap()

void xilinx::AIE::writeBufferMap	(	raw_ostream &	output,
		BufferOp	buf,
		int	offset
	)

Definition at line 103 of file AIETargets.cpp.

References getBufferBaseAddress().

Referenced by registerAIETranslations().

Variable Documentation

channel

int xilinx::AIE::channel

Definition at line 129 of file AIEDialect.h.

Referenced by AIETranslateShimSolution(), xilinx::AIE::AIE1TargetModel::getDmaControlAddress(), xilinx::AIE::AIE2TargetModel::getDmaControlAddress(), xilinx::AIE::AIETargetModel::getNumBDsForChannel(), xilinx::AIE::Pathfinder::initialize(), xilinx::AIE::AIE2TargetModel::isBdChannelAccessible(), operator<(), operator==(), operator==(), and xilinx::AIE::AIETargetModel::resolvePortValue().

col

int xilinx::AIE::col

Definition at line 55 of file AIETargetModel.h.

Referenced by xilinx::AIE::AIERTControl::addAieElf(), xilinx::AIE::AIERTControl::addAieElfs(), xilinx::AIE::Pathfinder::addFixedConnection(), xilinx::AIE::AIERTControl::addInitConfig(), aieRtDmaUpdateBdAddr(), AIETranslateGraphXPE(), AIETranslateShimSolution(), aieTranslateToBCF(), AIETranslateToHSA(), configureBdInBlock(), xilinx::AIE::AIERTControl::configureLocksAndBd(), configureLocksInBdBlock(), xilinx::AIE::AIERTControl::configureSwitches(), xilinx::AIE::AIERTControl::dmaUpdateBdAddr(), AIEObjectFifoStatefulTransformPass::findOrCreateTile(), AIEGenerateColumnControlOverlayPass::generatePacketFlowsForControl(), generateXAieDmaSetMultiDimAddr(), xilinx::AIE::AIE1TargetModel::getDmaBdAddress(), xilinx::AIE::AIE2TargetModel::getDmaBdAddress(), xilinx::AIE::AIE1TargetModel::getDmaBdAddressOffset(), xilinx::AIE::AIE2TargetModel::getDmaBdAddressOffset(), xilinx::AIE::AIE1TargetModel::getDmaControlAddress(), xilinx::AIE::AIE2TargetModel::getDmaControlAddress(), getNextCoords(), xilinx::AIE::AIE2TargetModel::getNumBanks(), xilinx::AIE::AIETargetModel::getNumBDs(), xilinx::AIE::AIETargetModel::getNumBDsForChannel(), xilinx::AIE::AIE1TargetModel::getNumDestShimMuxConnections(), xilinx::AIE::AIE2TargetModel::getNumDestShimMuxConnections(), xilinx::AIE::AIE1TargetModel::getNumDestSwitchboxConnections(), xilinx::AIE::AIE2TargetModel::getNumDestSwitchboxConnections(), xilinx::AIE::AIETargetModel::getNumLocks(), xilinx::AIE::AIE1TargetModel::getNumSourceShimMuxConnections(), xilinx::AIE::AIE2TargetModel::getNumSourceShimMuxConnections(), xilinx::AIE::AIE1TargetModel::getNumSourceSwitchboxConnections(), xilinx::AIE::AIE2TargetModel::getNumSourceSwitchboxConnections(), xilinx::AIE::DynamicTileAnalysis::getShimMux(), xilinx::AIE::AIE1TargetModel::getStreamSwitchPortIndex(), xilinx::AIE::AIE2TargetModel::getStreamSwitchPortIndex(), xilinx::AIE::DynamicTileAnalysis::getSwitchbox(), getTileToControllerIdMap(), getTileToControllerIdMap6RowsOrLess(), xilinx::AIE::VC1902TargetModel::getTileType(), xilinx::AIE::VE2302TargetModel::getTileType(), xilinx::AIE::VE2802TargetModel::getTileType(), xilinx::AIE::SequentialPlacer::initialize(), xilinx::AIE::Pathfinder::initialize(), xilinx::AIE::AIE2TargetModel::isBdChannelAccessible(), xilinx::AIE::AIETargetModel::isCoreTile(), xilinx::AIE::AIE1TargetModel::isLegalTileConnection(), xilinx::AIE::AIE2TargetModel::isLegalTileConnection(), xilinx::AIE::AIETargetModel::isMemTile(), xilinx::AIE::AIETargetModel::isShimNOCorPLTile(), xilinx::AIE::AIETargetModel::isShimNOCTile(), xilinx::AIE::AIETargetModel::isShimPLTile(), AIEBufferToStandard::matchAndRewrite(), AIECoreToStandardFunc::matchAndRewrite(), SetLockToWrite32Pattern::matchAndRewrite(), operator<(), operator==(), xilinx::AIE::SequentialPlacer::place(), xilinx::AIE::AIERTControl::pushToBdQueueAndEnable(), xilinx::AIE::AIERTControl::resetCore(), xilinx::AIE::AIERTControl::resetCoreUnreset(), xilinx::AIE::AIERTControl::resetDMA(), xilinx::AIE::AIERTControl::resetLock(), xilinx::AIE::AIERTControl::resetPerfCounters(), xilinx::AIE::AIERTControl::resetSwitch(), xilinx::AIE::AIERTControl::resetSwitchConnection(), xilinx::AIE::DynamicTileAnalysis::runAnalysis(), xilinx::AIE::AIEPathfinderPass::runOnOperation(), AIEAssignBufferDescriptorIDsPass::runOnOperation(), AIEAssignTileCtrlIDsPass::runOnOperation(), AIEGenerateColumnControlOverlayPass::runOnOperation(), AIELocalizeLocksPass::runOnOperation(), AIECtrlPacketToDmaPass::runOnOperation(), xilinx::AIE::AIEPathfinderPass::runOnPacketFlow(), tileDMAInstRefStr(), tileDMAInstRefStr(), tileDMAInstStr(), tileDMAInstStr(), tileLocStr(), tileLocStr(), and translateSwitchboxes().

connectivity

std::vector<std::vector<Connectivity> > xilinx::AIE::connectivity

Definition at line 43 of file AIEPathFinder.h.

Referenced by resize().

coords

TileID xilinx::AIE::coords

Definition at line 99 of file AIEPathFinder.h.

Referenced by xilinx::AIE::Pathfinder::addFixedConnection(), xilinx::AIE::Pathfinder::findPaths(), xilinx::AIE::Pathfinder::initialize(), operator<(), and operator==().

demand

std::vector<std::vector<double> > xilinx::AIE::demand

Definition at line 45 of file AIEPathFinder.h.

Referenced by bumpDemand(), resize(), and updateDemand().

dst

Port xilinx::AIE::dst

Definition at line 159 of file AIEDialect.h.

Referenced by xilinx::AIE::Pathfinder::addFlow(), getAvailableDestChannel(), operator<(), operator==(), and AIELowerCascadeFlowsPass::runOnOperation().

dstCoords

TileID xilinx::AIE::dstCoords

Definition at line 39 of file AIEPathFinder.h.

Referenced by xilinx::AIE::Pathfinder::addFlow(), and xilinx::AIE::DynamicTileAnalysis::runAnalysis().

dstPorts

std::vector<Port> xilinx::AIE::dstPorts

Definition at line 41 of file AIEPathFinder.h.

Referenced by resize(), and updateDemand().

dsts

std::vector< Port > xilinx::AIE::dsts

Definition at line 129 of file AIEPathFinder.h.

Referenced by xilinx::AIE::Pathfinder::addFlow(), and xilinx::AIE::Pathfinder::findPaths().

hsa_cpp_file_header

const char* xilinx::AIE::hsa_cpp_file_header

Initial value:

= R"code(
// This file was auto-generated by aiecc.py --aie-generate-hsa
 
#ifndef MLIR_AIE_QUIET
#define __mlir_aie_verbose(x) x
#else
#define __mlir_aie_verbose(x)
#endif
 
)code"

Definition at line 34 of file AIETargetHSA.cpp.

Referenced by AIETranslateToHSA().

isPriority

std::vector<std::vector<bool> > xilinx::AIE::isPriority

Definition at line 55 of file AIEPathFinder.h.

Referenced by bumpDemand(), xilinx::AIE::Pathfinder::findPaths(), and resize().

isPriorityFlow

bool xilinx::AIE::isPriorityFlow

Definition at line 127 of file AIEPathFinder.h.

Referenced by xilinx::AIE::Pathfinder::addFlow().

os

return xilinx::AIE::os

Definition at line 30 of file AIETargetModel.h.

Referenced by aieLLVMLink(), aieTranslateAIEVecToCpp(), aieTranslateModuleToLLVMIR(), aieTranslateToBCF(), aieTranslateToHSA(), aieTranslateToXAIEV2(), operator<<(), operator<<(), operator<<(), operator<<(), operator<<(), operator<<(), operator<<(), and xilinx::AIEX::TokenAnalysis::print().

overCapacity

std::vector<std::vector<int> > xilinx::AIE::overCapacity

Definition at line 47 of file AIEPathFinder.h.

Referenced by resize(), and updateDemand().

packetFlowCount

std::vector<std::vector<int> > xilinx::AIE::packetFlowCount

Definition at line 51 of file AIEPathFinder.h.

Referenced by resize().

packetGroupId

std::vector<std::vector<int> > xilinx::AIE::packetGroupId

Definition at line 53 of file AIEPathFinder.h.

Referenced by xilinx::AIE::Pathfinder::addFlow(), xilinx::AIE::Pathfinder::findPaths(), and resize().

port

Port xilinx::AIE::port

Definition at line 100 of file AIEPathFinder.h.

Referenced by AIEObjectFifoStatefulTransformPass::createUseLocks(), AIEObjectFifoStatefulTransformPass::dynamicGlobalObjectFifos(), xilinx::AIE::Pathfinder::findPaths(), getAvailableDestChannel(), ConnectivityAnalysis::getConnectedTiles(), operator<(), operator<<(), operator<<(), operator<<(), operator==(), AIEObjectFifoStatefulTransformPass::runOnOperation(), and translateSwitchboxes().

row

int xilinx::AIE::row

Definition at line 55 of file AIETargetModel.h.

Referenced by xilinx::AIE::AIERTControl::addAieElf(), xilinx::AIE::AIERTControl::addAieElfs(), xilinx::AIE::Pathfinder::addFixedConnection(), xilinx::AIE::AIERTControl::addInitConfig(), aieRtDmaUpdateBdAddr(), AIETranslateGraphXPE(), aieTranslateToBCF(), configureBdInBlock(), xilinx::AIE::AIERTControl::configureLocksAndBd(), configureLocksInBdBlock(), xilinx::AIE::AIERTControl::configureSwitches(), xilinx::AIE::AIERTControl::dmaUpdateBdAddr(), AIEObjectFifoStatefulTransformPass::findOrCreateTile(), generateXAieDmaSetMultiDimAddr(), xilinx::AIE::AIE1TargetModel::getDmaBdAddress(), xilinx::AIE::AIE2TargetModel::getDmaBdAddress(), xilinx::AIE::AIE1TargetModel::getDmaBdAddressOffset(), xilinx::AIE::AIE2TargetModel::getDmaBdAddressOffset(), xilinx::AIE::AIE1TargetModel::getDmaControlAddress(), xilinx::AIE::AIE2TargetModel::getDmaControlAddress(), getNextCoords(), xilinx::AIE::AIE2TargetModel::getNumBanks(), xilinx::AIE::AIETargetModel::getNumBDs(), xilinx::AIE::AIETargetModel::getNumBDsForChannel(), xilinx::AIE::AIE1TargetModel::getNumDestShimMuxConnections(), xilinx::AIE::AIE2TargetModel::getNumDestShimMuxConnections(), xilinx::AIE::AIE1TargetModel::getNumDestSwitchboxConnections(), xilinx::AIE::AIE2TargetModel::getNumDestSwitchboxConnections(), xilinx::AIE::AIETargetModel::getNumLocks(), xilinx::AIE::AIE1TargetModel::getNumSourceShimMuxConnections(), xilinx::AIE::AIE2TargetModel::getNumSourceShimMuxConnections(), xilinx::AIE::AIE1TargetModel::getNumSourceSwitchboxConnections(), xilinx::AIE::AIE2TargetModel::getNumSourceSwitchboxConnections(), xilinx::AIE::DynamicTileAnalysis::getShimMux(), xilinx::AIE::AIE1TargetModel::getStreamSwitchPortIndex(), xilinx::AIE::AIE2TargetModel::getStreamSwitchPortIndex(), xilinx::AIE::DynamicTileAnalysis::getSwitchbox(), getTileToControllerIdMap(), getTileToControllerIdMap6RowsOrLess(), xilinx::AIE::VC1902TargetModel::getTileType(), xilinx::AIE::VE2302TargetModel::getTileType(), xilinx::AIE::VE2802TargetModel::getTileType(), xilinx::AIE::VirtualizedNPU1TargetModel::getTileType(), xilinx::AIE::BaseNPU2TargetModel::getTileType(), xilinx::AIE::SequentialPlacer::initialize(), xilinx::AIE::Pathfinder::initialize(), xilinx::AIE::AIE2TargetModel::isBdChannelAccessible(), xilinx::AIE::AIETargetModel::isCoreTile(), xilinx::AIE::AIE1TargetModel::isLegalTileConnection(), xilinx::AIE::AIE2TargetModel::isLegalTileConnection(), xilinx::AIE::AIETargetModel::isMemTile(), xilinx::AIE::AIETargetModel::isShimNOCorPLTile(), xilinx::AIE::AIETargetModel::isShimNOCTile(), xilinx::AIE::AIETargetModel::isShimPLTile(), AIEBufferToStandard::matchAndRewrite(), AIECoreToStandardFunc::matchAndRewrite(), SetLockToWrite32Pattern::matchAndRewrite(), operator<(), operator==(), xilinx::AIE::SequentialPlacer::place(), xilinx::AIE::AIERTControl::pushToBdQueueAndEnable(), xilinx::AIE::AIERTControl::resetCore(), xilinx::AIE::AIERTControl::resetCoreUnreset(), xilinx::AIE::AIERTControl::resetDMA(), xilinx::AIE::AIERTControl::resetLock(), xilinx::AIE::AIERTControl::resetPerfCounters(), xilinx::AIE::AIERTControl::resetSwitch(), xilinx::AIE::AIERTControl::resetSwitchConnection(), xilinx::AIE::DynamicTileAnalysis::runAnalysis(), xilinx::AIE::AIEPathfinderPass::runOnOperation(), AIEAssignBufferDescriptorIDsPass::runOnOperation(), AIELocalizeLocksPass::runOnOperation(), AIECtrlPacketToDmaPass::runOnOperation(), xilinx::AIE::AIEPathfinderPass::runOnPacketFlow(), tileDMAInstRefStr(), tileDMAInstRefStr(), tileDMAInstStr(), tileDMAInstStr(), tileLocStr(), tileLocStr(), and translateSwitchboxes().

src

PathEndPoint xilinx::AIE::src

Definition at line 128 of file AIEPathFinder.h.

Referenced by xilinx::AIE::Pathfinder::addFlow(), xilinx::AIE::Pathfinder::dijkstraShortestPaths(), xilinx::AIE::Pathfinder::findPaths(), xilinx::AIE::AIEPathfinderPass::findPathToDest(), getAvailableDestChannel(), xilinx::AIE::AIE1TargetModel::getMemEast(), xilinx::AIE::AIE2TargetModel::getMemEast(), xilinx::AIE::AIE1TargetModel::getMemInternalBaseAddress(), xilinx::AIE::AIE1TargetModel::getMemNorth(), xilinx::AIE::AIE2TargetModel::getMemNorth(), xilinx::AIE::AIE1TargetModel::getMemSouth(), xilinx::AIE::AIE2TargetModel::getMemSouth(), xilinx::AIE::AIE1TargetModel::getMemWest(), xilinx::AIE::AIE2TargetModel::getMemWest(), xilinx::AIE::AIETargetModel::isValidTile(), operator<(), operator==(), AIELowerCascadeFlowsPass::runOnOperation(), and xilinx::AIE::AIEPathfinderPass::runOnPacketFlow().

srcCoords

TileID xilinx::AIE::srcCoords

Definition at line 39 of file AIEPathFinder.h.

Referenced by xilinx::AIE::Pathfinder::addFlow(), xilinx::AIE::DynamicTileAnalysis::runAnalysis(), and xilinx::AIE::AIEPathfinderPass::runOnPacketFlow().

srcPorts

std::vector<Port> xilinx::AIE::srcPorts

Definition at line 40 of file AIEPathFinder.h.

Referenced by resize(), and updateDemand().

srcs

std::vector<Port> xilinx::AIE::srcs

Definition at line 141 of file AIEPathFinder.h.

Referenced by operator<().

usedCapacity

std::vector<std::vector<int> > xilinx::AIE::usedCapacity

Definition at line 49 of file AIEPathFinder.h.

Referenced by bumpDemand(), resize(), and updateDemand().