AIEVec Passes

-aievec-split-load-ups-chains

Split 1024-bit vector loads and stores whose halves are widened or narrowed separately

On AIE2P, splits a 1024-bit vector access into two 512-bit accesses when the value is only used, or produced, one half at a time: - vector.load feeding aievec.ups (v64i16 -> v64i32); - aievec.srs (v64i32 -> v64i16) feeding vector.store; - vector.load of v64bf16 feeding only the LHS of bf16 8x8x8 aievec.matmul_aie2p ops, whose lowering widens the LHS in two halves. Each half then gets its own memory access instead of being extracted from the full-width value with shuffles.