AIEBufferAllocation.h File Reference

#include "aie/Dialect/AIE/IR/AIETargetModel.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/MathExtras.h"
#include <optional>
#include <utility>

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Classes
struct	xilinx::AIE::TileMemoryLimits
	A memtile is reached by DMA rather than by core vector load and store, so its bus width also covers the vector-alignment requirement. More...
struct	xilinx::AIE::BufferAllocation

Namespaces
namespace	xilinx
namespace	xilinx::AIE

Functions
TileMemoryLimits	xilinx::AIE::tileMemoryLimits (const AIETargetModel &targetModel, AIETileType tileType)
uint32_t	xilinx::AIE::requiredBufferAlignBits (uint32_t busAlignBits, uint32_t maxVecAlignBits, int64_t sizeBytes)
	Return the alignment (in bits) a buffer of sizeBytes must satisfy.
int64_t	xilinx::AIE::assignSequentialBufferAddresses (llvm::MutableArrayRef< BufferAllocation > buffers, int64_t start=0)
	The basic address allocator and resource planner share this layout: retain address pins, then place unpinned buffers largest-first, aligning each start and skipping occupied ranges.