MLIR-AIE 1.4.5.dev
AIETargets.h
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1/* Copyright (C) 2021 Xilinx, Inc.
2 * Copyright (C) 2022-2026 Advanced Micro Devices, Inc.
3 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */
4
5//===- AIETargets.h ---------------------------------------------*- C++ -*-===//
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef AIE_TARGETS_AIETARGETS_H
10#define AIE_TARGETS_AIETARGETS_H
11
12#include "mlir/IR/BuiltinOps.h"
13#include "mlir/IR/Location.h"
14#include "mlir/IR/MLIRContext.h"
15#include "mlir/Support/LogicalResult.h"
16
17#include "llvm/ADT/DenseMap.h"
18#include "llvm/ADT/STLFunctionalExtras.h"
19#include "llvm/ADT/StringRef.h"
20#include "llvm/Support/raw_ostream.h"
21
22#include <array>
23#include <cstdint>
24#include <memory>
25#include <mutex>
26#include <optional>
27#include <string>
28#include <vector>
29
30namespace xilinx {
31namespace AIE {
32
33// One entry in the sidecar location map produced by AIETranslateNpuToBinary
34// (and AIETranslateControlPacketsToUI32Vec). Each entry describes one
35// transaction operation in the .bin: the byte range it occupies, its opcode,
36// the absolute device address it touches (when applicable), the originating
37// aiex.npu.* op's MLIR Location, and an optional regdb register name resolved
38// from (address, tile-module). The vector is written alongside the .bin as a
39// JSON sidecar (see emitNpuLocmapJSON) so consumers can correlate transaction
40// words back to the source op's MLIR Location.
42 uint32_t byteOffset = 0;
43 uint32_t byteSize = 0;
44 std::string opcodeName; // "WRITE32", "BLOCKWRITE", etc.
45 std::string sourceOpName; // "aiex.npu.write32", etc.
46 std::optional<uint64_t> address; // absolute device address when applicable
47 std::string registerName; // regdb-resolved register name; empty if unknown
48 std::string
49 registerModule; // regdb module: "core", "memory", "memory_tile", "shim"
50 std::optional<mlir::Location> loc;
51};
52
53// Serialize a vector of TxnLocEntry as JSON to `output`, with the given
54// device name and binary file basename for the JSON header.
55void emitNpuLocmapJSON(llvm::raw_ostream &output, llvm::StringRef deviceName,
56 llvm::StringRef binaryName,
57 const std::vector<TxnLocEntry> &locmap);
58
59mlir::LogicalResult AIETranslateToXAIEV2(mlir::ModuleOp module,
60 llvm::raw_ostream &output,
61 llvm::StringRef deviceName = "");
62mlir::LogicalResult AIEFlowsToJSON(mlir::ModuleOp module,
63 llvm::raw_ostream &output,
64 llvm::StringRef deviceName = "");
65mlir::LogicalResult AIETranslateSCSimConfig(mlir::ModuleOp module,
66 llvm::raw_ostream &output,
67 llvm::StringRef deviceName = "");
68mlir::LogicalResult AIETranslateShimSolution(mlir::ModuleOp module,
69 llvm::raw_ostream &,
70 llvm::StringRef deviceName = "");
71mlir::LogicalResult AIETranslateGraphXPE(mlir::ModuleOp module,
72 llvm::raw_ostream &, llvm::StringRef);
73// The TXN encoding of each device an aiex.npu.write_config or write_teardown
74// names. Shared by the translations of one module's sequences, folded or not,
75// it encodes each written device once: a configuration's writes patch no DDR
76// address. Safe to share across threads.
78public:
79 struct Config {
80 std::vector<uint32_t> words;
81 uint32_t count = 0;
82 // At offsets from the first word.
83 std::vector<TxnLocEntry> locmap;
84 };
85
86 // `device`'s configuration, or with `teardown` its teardown, encoded by
87 // `encode` the first time it is asked for; nullptr if that failed.
88 const Config *
89 getOrEncode(mlir::Operation *device, bool teardown,
90 llvm::function_ref<mlir::LogicalResult(Config &)> encode);
91
92private:
93 std::mutex mutex;
94 // Indexed by whether the encoding is a teardown.
95 std::array<llvm::DenseMap<mlir::Operation *, std::unique_ptr<Config>>, 2>
96 configs;
97};
98
99mlir::LogicalResult AIETranslateNpuToBinary(
100 mlir::ModuleOp, std::vector<uint32_t> &, llvm::StringRef deviceName = "",
101 llvm::StringRef sequenceName = "",
102 std::vector<TxnLocEntry> *locmap = nullptr, bool foldDDRAddrOffset = true,
103 NpuConfigCache *configs = nullptr);
104/// \brief Emit a C++ builder that reconstructs the TXN stream at runtime.
105/// \param foldDDRAddrOffset apply firmware DDR folding; see
106/// aie/Runtime/TxnEncoding.h for the runtime-specific address convention.
107/// \param emitDispatchShim also emit the extern "C" dispatch_abi() /
108/// dispatch_generate() entry points the JIT dispatch bridge loads via ctypes.
109mlir::LogicalResult AIETranslateNpuToCpp(mlir::ModuleOp module,
110 llvm::raw_ostream &output,
111 bool foldDDRAddrOffset = true,
112 bool emitDispatchShim = false);
113mlir::LogicalResult AIETranslateToUcDma(mlir::ModuleOp module,
114 llvm::raw_ostream &output);
115mlir::LogicalResult AIETranslateToUcDma(mlir::ModuleOp module,
116 std::string &assembly,
117 llvm::StringRef outputPath = "");
118mlir::LogicalResult
119AIETranslateControlPacketsToUI32Vec(mlir::ModuleOp, std::vector<uint32_t> &,
120 llvm::StringRef deviceName = "",
121 llvm::StringRef sequenceName = "",
122 std::vector<TxnLocEntry> *locmap = nullptr);
123// `resolveLinkFile`, when given, rewrites each `link_files` entry before it
124// becomes an INPUT() directive.
125mlir::LogicalResult AIETranslateToLdScript(
126 mlir::ModuleOp module, llvm::raw_ostream &output, int tileCol, int tileRow,
127 llvm::StringRef deviceName = "", bool probe = false,
128 llvm::function_ref<std::string(llvm::StringRef)> resolveLinkFile = nullptr);
129mlir::LogicalResult AIETranslateToBCF(mlir::ModuleOp module,
130 llvm::raw_ostream &output, int tileCol,
131 int tileRow,
132 llvm::StringRef deviceName = "");
133mlir::LogicalResult
134AIELLVMLink(llvm::raw_ostream &output, const std::vector<std::string> &Files,
135 bool DisableDITypeMap = false, bool NoVerify = false,
136 bool Internalize = false, bool OnlyNeeded = false,
137 bool PreserveAssemblyUseListOrder = false, bool Verbose = false);
138
139mlir::LogicalResult AIETranslateToCDODirect(
140 mlir::ModuleOp m, llvm::StringRef workDirPath, llvm::StringRef deviceName,
141 bool bigEndian = false, bool emitUnified = false, bool cdoDebug = false,
142 bool aieSim = false, bool xaieDebug = false, bool enableCores = true);
143
144mlir::LogicalResult AIETranslateToTargetArch(mlir::ModuleOp module,
145 llvm::raw_ostream &output,
146 llvm::StringRef deviceName);
147
148} // namespace AIE
149
150} // namespace xilinx
151
152#endif
const Config * getOrEncode(mlir::Operation *device, bool teardown, llvm::function_ref< mlir::LogicalResult(Config &)> encode)
void emitNpuLocmapJSON(llvm::raw_ostream &output, llvm::StringRef deviceName, llvm::StringRef binaryName, const std::vector< TxnLocEntry > &locmap)
mlir::LogicalResult AIETranslateToUcDma(mlir::ModuleOp module, llvm::raw_ostream &output)
mlir::LogicalResult AIETranslateSCSimConfig(mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName="")
mlir::LogicalResult AIETranslateToCDODirect(mlir::ModuleOp m, llvm::StringRef workDirPath, llvm::StringRef deviceName, bool bigEndian=false, bool emitUnified=false, bool cdoDebug=false, bool aieSim=false, bool xaieDebug=false, bool enableCores=true)
mlir::LogicalResult AIETranslateControlPacketsToUI32Vec(mlir::ModuleOp, std::vector< uint32_t > &, llvm::StringRef deviceName="", llvm::StringRef sequenceName="", std::vector< TxnLocEntry > *locmap=nullptr)
mlir::LogicalResult AIETranslateToTargetArch(mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName)
mlir::LogicalResult AIETranslateNpuToBinary(mlir::ModuleOp, std::vector< uint32_t > &, llvm::StringRef deviceName="", llvm::StringRef sequenceName="", std::vector< TxnLocEntry > *locmap=nullptr, bool foldDDRAddrOffset=true, NpuConfigCache *configs=nullptr)
mlir::LogicalResult AIEFlowsToJSON(mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName="")
mlir::LogicalResult AIELLVMLink(llvm::raw_ostream &output, const std::vector< std::string > &Files, bool DisableDITypeMap=false, bool NoVerify=false, bool Internalize=false, bool OnlyNeeded=false, bool PreserveAssemblyUseListOrder=false, bool Verbose=false)
mlir::LogicalResult AIETranslateToBCF(mlir::ModuleOp module, llvm::raw_ostream &output, int tileCol, int tileRow, llvm::StringRef deviceName="")
mlir::LogicalResult AIETranslateNpuToCpp(mlir::ModuleOp module, llvm::raw_ostream &output, bool foldDDRAddrOffset=true, bool emitDispatchShim=false)
Emit a C++ builder that reconstructs the TXN stream at runtime.
mlir::LogicalResult AIETranslateShimSolution(mlir::ModuleOp module, llvm::raw_ostream &, llvm::StringRef deviceName="")
mlir::LogicalResult AIETranslateGraphXPE(mlir::ModuleOp module, llvm::raw_ostream &, llvm::StringRef)
mlir::LogicalResult AIETranslateToXAIEV2(mlir::ModuleOp module, llvm::raw_ostream &output, llvm::StringRef deviceName="")
mlir::LogicalResult AIETranslateToLdScript(mlir::ModuleOp module, llvm::raw_ostream &output, int tileCol, int tileRow, llvm::StringRef deviceName="", bool probe=false, llvm::function_ref< std::string(llvm::StringRef)> resolveLinkFile=nullptr)
std::vector< uint32_t > words
Definition AIETargets.h:80
std::vector< TxnLocEntry > locmap
Definition AIETargets.h:83
std::optional< uint64_t > address
Definition AIETargets.h:46
std::string registerModule
Definition AIETargets.h:49
std::optional< mlir::Location > loc
Definition AIETargets.h:50