IP Configuration ParametersΒΆ
Features |
Options |
Remarks |
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DMA Interface Selection |
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Number of Queues |
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Bridge Interface Options |
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SRIOV |
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PCIE BARs |
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Enable PF0 MSI-X Capability Structure |
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Exteded Tag Field |
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Enable Slot Clock Configuration |
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Descriptor Bypass for read and write |
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Performance Options |
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Data Protection |
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Descriptor Fetch Credit (enabled in software context) |
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Are these enabled? |
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Status Descriptor Enabled? (if user_trig was set when marker was inserted) |
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C2H Streaming Completion |
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Interrupts and completion status writes individually enabled and disabled for each queue? |
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Is Error mask enabled? |
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Descriptor Bypass per queue? |
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Internal mode for all queues? |
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Prefetch enabled per queue? |
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Interrupt mode enabled? |
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Is Traffic manager used? |
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C2H Stream Modes (Descriptor Prefetch Cache Mode) |
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C2H Stream Packet Types |
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