1. Introduction¶

The DSP Library for AI Engine provides a set of DSP library elements. Each library element consists of a main graph class and a corresponding kernel class, but also includes a reference model graph class.

1.1. Navigating Content by Design Process¶

Xilinx® documentation is organized around a set of standard design processes to help you find relevant content for your current development task. This document covers the following design processes:

AI Engine Development: Creating the AI Engine graph and kernels, library use, simulation debugging and profiling, and algorithm development. Also includes the integration of the Programmable Logic (PL) and AI Engine kernels. Topics in this document that apply to this design process include:
System and Solution Planning: Identifying the components, performance, I/O, and data transfer requirements at a system level. Includes application mapping for the solution to Processing Subsystem (PS), PL, and AI Engine. Topics in this document that apply to this design process include:
System Integration and Validation: Integrating and validating the system functional performance, including timing, resource use, and power closure. Topics in this document that apply to this design process include:
- Compiling and Simulating Using the Makefile
- API Reference Overview

1.2. Organization¶

The following figure shows the DSPLib organization.

Figure 1: DSPLib Organization

The directories L1, L2, and L3 correspond to AI Engine kernels, AI Engine graphs, and drivers for each function, respectively. Inclusion of an L2 graph rather than an L1 element is recommended in your design.

Note

The L3 directory is not yet available.

Graph class declarations and constants that allow you to include the library element in your design are located in the L2/include/aie/. Kernel class definitions, the .cpp files and corresponding .hpp files are located in the L1/src/aie and L1/include/aie subdirectories respectively.

The L2/tests/aie/<library_element> subdirectory contains a test bench for the library element. Additional testbench files, like stimulus, monitor, and other utility modules are located in the L1/tests/aie/inc/ folder.

Reference models graph class for each library element are contained in L2/tests/aie/common/inc. Reference models kernel class for each library element are contained in L1/tests/aie/inc/ and L1/tests/aie/src.

The L2/examples subdirectory holds example wrapper designs to demonstrate the use of the library elements.

1.3. Using Library Elements within User Defined Graphs¶

It is recommended that the library element to include in your graph is from the L2 directory, that is, a subgraph. For instance, to include a single rate asymmetrical FIR filter, include fir_sr_asym_graph.hpp from the L2/include/aie/ folder. The test harness for each library unit can be used as a reference example of how to instantiate a parameterized graph. For example, see L2/tests/aie/<library_element>/test.hpp and test.cpp.

An example test.h and test.cpp which instantiates a parameterized graph and exposes a configured (point solution) interface is provided in the L2/examples/fir_129t_sym folder.

Set the environment variable to DSPLIB_ROOT.

setenv DSPLIB_ROOT <your-vitis-libraries-install-path/dsp>

Note

Use setenv for csh and export DSPLIB_ROOT=<path> for bash.

Use the following option in the aiecompiler command to provide the path:

-include=$DSPLIB_ROOT/L2/include/aie/
-include=$DSPLIB_ROOT/L1/include/aie
-include=$DSPLIB_ROOT/L1/src/aie

1.4. Known Issues¶

See Xilinx® Answer Record 75802 for the list of known issues.

1.5. Vitis Tutorials¶

Xilinx® provides an extensive library of purpose build tutorials. It is recommended to visit Vitis Tutorials to get familiar with Vitis™ in-Depth tutorials.

To learn how to use the Vitis core tools to develop for Versal®, the first Adaptive Compute Acceleration Platform (ACAP) device from Xilinx please visit AI Engine Development Tutorials. There is a variety of design, methodology, and feature tutorials, where you may also find a highly recommended DSP Library Tutorial which demonstrates how to use kernels provided by the DSP library for a filtering application, how to analyze the design results, and how to use filter parameters to optimize the design’s performance using simulation.

Finally, Simulink users could be interested in AI Engine DSP Library and Model Composer Tutorial which shows how to design AI Engine applications using Model Composer