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MLIR-AIE 1.4.5.dev
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#include "aie/Dialect/AIE/IR/AIETargetModel.h"
Public Member Functions | |
| NPU2TargetModel () | |
| int | columns () const override |
| Return the number of columns in the device. | |
| Public Member Functions inherited from xilinx::AIE::BaseNPU2TargetModel | |
| BaseNPU2TargetModel (TargetModelKind k) | |
| AIEArch | getTargetArch () const override |
| Return the target architecture. | |
| uint32_t | getComputeTileMaxVectorAlignBits () const override |
| Return the alignment (in bits) required by the widest vector load/store a compute core can issue. | |
| int | rows () const override |
| Return the number of rows in the device. | |
| int | physicalColumns () const override |
| Width of the physical array this (possibly virtualized) device is carved from. | |
| AIETileType | getTileType (int col, int row) const override |
| Return the tile type for the given tile coordinates. | |
| uint32_t | getNumMemTileRows () const override |
| std::vector< std::pair< uint32_t, uint32_t > > | getShimBurstEncodingsAndLengths () const override |
| bool | isSupportedBlockFormat (std::string const &format) const override |
| bool | isMemTilePadValueSupported () const override |
| uint32_t | getNumControllers () const override |
| Total number of microcontrollers (uC) in the device. | |
| Public Member Functions inherited from xilinx::AIE::AIE2TargetModel | |
| AIE2TargetModel (TargetModelKind k) | |
| uint32_t | getAddressGenGranularity () const override |
| Return the data bus width of the device. | |
| uint32_t | getNumSlaveSlots () const override |
| Return the number of packet-rule slots per stream-switch slave port. | |
| uint32_t | getNumArbiters () const override |
| Return the number of arbiters per stream switch. | |
| uint32_t | getNumMselsPerArbiter () const override |
| Return the number of master select values per stream-switch arbiter. | |
| uint32_t | getMaxPacketId () const override |
| Return the largest packet id the stream switch can route. | |
| uint32_t | getMaxOutOfOrderId () const override |
| Return the largest out-of-order BD id (unsupported = 0). | |
| uint32_t | getMaxRepeatCount () const override |
| Return the largest DMA task repeat count (unsupported = 0). | |
| uint32_t | getDmaTaskQueueDepth () const override |
| Return how many DMA tasks a single channel's task queue holds (unsupported = 0). | |
| std::optional< TileID > | getMemWest (TileID src) const override |
| Return the tile ID of the memory to the west of the given tile, if it exists. | |
| std::optional< TileID > | getMemEast (TileID src) const override |
| Return the tile ID of the memory to the east of the given tile, if it exists. | |
| std::optional< TileID > | getMemNorth (TileID src) const override |
| Return the tile ID of the memory to the north of the given tile, if it exists. | |
| std::optional< TileID > | getMemSouth (TileID src) const override |
| Return the tile ID of the memory to the south of the given tile, if it exists. | |
| bool | isMemWest (int srcCol, int srcRow, int dstCol, int dstRow) const override |
| Return true if src has a memory tile which is West of dst. | |
| bool | isMemEast (int srcCol, int srcRow, int dstCol, int dstRow) const override |
| Return true if src has a memory tile which is East of dst. | |
| bool | isMemNorth (int srcCol, int srcRow, int dstCol, int dstRow) const override |
| Return true if src has a memory tile which is North of dst. | |
| bool | isMemSouth (int srcCol, int srcRow, int dstCol, int dstRow) const override |
| Return true if src has a memory tile which is South of dst. | |
| bool | isLegalMemAffinity (int coreCol, int coreRow, int memCol, int memRow) const override |
| Return true if core can access the memory in mem. | |
| uint32_t | getMemInternalBaseAddress (TileID src) const override |
| Return the base address in the local address map for a core. | |
| uint32_t | getMemSouthBaseAddress () const override |
| Return the base address in the local address map for a core. | |
| uint32_t | getMemWestBaseAddress () const override |
| Return the base address in the local address map for a core. | |
| uint32_t | getMemNorthBaseAddress () const override |
| Return the base address in the local address map for a core. | |
| uint32_t | getMemEastBaseAddress () const override |
| Return the base address in the local address map for a core. | |
| uint32_t | getLocalMemorySize () const override |
| Return the size (in bytes) of the local data memory of a core. | |
| uint32_t | getProgramMemorySize () const override |
| Return the size (in bytes) of a core's program memory. | |
| uint32_t | getCoreDataAddressSpaceSize () const override |
| Return the size (in bytes) of the address space a core can issue data accesses into. | |
| uint32_t | getAccumulatorCascadeSize () const override |
| Return the size (in bits) of the accumulator/cascade. | |
| uint32_t | getComputeTileLoadStoreBusWidth () const override |
| Return the data bus width (in bits) for load/store operations of a compute core. | |
| uint32_t | getNumLocks (AIETileType tileType) const override |
| Return the number of lock objects for a given tile type. | |
| uint32_t | getMaxLockValue () const override |
| Return the maximum value that can be stored in a lock register. | |
| std::optional< uint32_t > | getLocalLockAddress (uint32_t lockId, TileID tile) const override |
| uint32_t | getNumBDs (AIETileType tileType) const override |
| Return the number of buffer descriptors for a given tile type. | |
| uint32_t | getBDMaxDims (AIETileType tileType) const override |
| Return the maximum number of addressing dimensions (wraps/strides) a single buffer descriptor supports for a given tile type. | |
| const DmaBdLayout & | getDmaBdLimits (AIETileType tileType) const |
| uint64_t | getDmaBdMaxLen (AIETileType tileType) const override |
| Return the maximum transfer length, measured in address-generation granules (see getAddressGenGranularity(), 32-bit words on AIE2), that fits in the buffer_length field of a DMA buffer descriptor for the given tile type. | |
| uint32_t | getDmaBdWrapBits (AIETileType tileType) const override |
| Return the bit width of the wrap (size) field in a DMA buffer descriptor for the given tile type. | |
| uint32_t | getDmaBdStepBits (AIETileType tileType) const override |
| Return the bit width of the step (stride) field in a DMA buffer descriptor for the given tile type. | |
| uint32_t | getDmaBdIterBits (AIETileType tileType) const override |
| Return the bit width of the iteration (repeat) wrap/stride fields in a DMA buffer descriptor for the given tile type. | |
| bool | isBdChannelAccessible (int col, int row, uint32_t bd_id, int channel) const override |
| Return true iff buffer descriptor bd_id on tile (col, row) can be submitted on channel channel. | |
| const DmaBdLayout * | getDmaBdLayout (AIETileType tileType) const override |
| Return the register layout of a buffer descriptor on the given tile type, or null if the target has none modeled for it. | |
| uint64_t | getDmaBdAddress (int col, int row, uint32_t bd_id, int channel, AIE::DMAChannelDir direction) const override |
| Return the array address of the dma buffer descriptor for the given col, row, buffer descriptor id, channel and direction. | |
| uint32_t | getDmaBdAddressOffset (int col, int row) const override |
| Return the offset of the base address field within the shim dma buffer descriptor. | |
| uint32_t | getDmaControlAddress (int col, int row, int channel, AIE::DMAChannelDir direction) const override |
| Return the array address of the dma task queue register for the given col, row, channel and direction. | |
| std::optional< uint32_t > | getDmaStatusAddress (int col, int row, int channel, AIE::DMAChannelDir direction) const override |
| Return the address of the DMA status register for a channel, or nullopt when this target's layout has not been verified. | |
| uint32_t | getDmaTaskQueueSizeMask () const override |
| Return the mask selecting the live task-queue occupancy field within the getDmaStatusAddress() register (0 when unsupported). | |
| uint32_t | getDmaChannelIdleMask () const override |
| Return the bits of the getDmaStatusAddress() register that are all clear exactly when the channel has finished every task pushed to it: nothing queued, nothing running, nothing stalled (0 when unsupported). | |
| uint32_t | getMemTileSize () const override |
| Return the size (in bytes) of a MemTile. | |
| uint32_t | getNumBanks (int col, int row) const override |
| Return the number of memory banks of a given tile. | |
| uint32_t | getMaxChannelNumForAdjacentMemTile (int col, int row) const override |
| uint32_t | getNumDestSwitchboxConnections (int col, int row, WireBundle bundle) const override |
| Return the number of destinations of connections inside a switchbox. | |
| uint32_t | getNumSourceSwitchboxConnections (int col, int row, WireBundle bundle) const override |
| Return the number of sources of connections inside a switchbox. | |
| uint32_t | getNumDestShimMuxConnections (int col, int row, WireBundle bundle) const override |
| Return the number of destinations of connections inside a shimmux. | |
| uint32_t | getNumSourceShimMuxConnections (int col, int row, WireBundle bundle) const override |
| Return the number of sources of connections inside a shimmux. | |
| bool | isLegalTileConnection (int col, int row, WireBundle srcBundle, int srcChan, WireBundle dstBundle, int dstChan) const override |
| std::optional< uint32_t > | getStreamSwitchPortIndex (int col, int row, WireBundle bundle, uint32_t port_num, bool master) const override |
| Get stream switch port index for a given port specification Return port index for Stream_Switch_Event_Port_Selection register, or nullopt if invalid. | |
| uint32_t | getColumnShift () const override |
| uint32_t | getRowShift () const override |
| uint32_t | getNumLocks (int col, int row) const |
| Return the number of lock objects for a tile at the given coordinates. | |
| const DmaBdLayout * | getDmaBdLayout (int col, int row) const |
| Public Member Functions inherited from xilinx::AIE::AIETargetModel | |
| TargetModelKind | getKind () const |
| AIETargetModel (TargetModelKind k) | |
| virtual | ~AIETargetModel () |
| virtual int | firstPlaceableColumn () const |
| First physical column at which a partition may be anchored. | |
| std::vector< int > | partitionStartColumns (int numCols) const |
| Every physical column offset at which a numCols-wide partition still fits. | |
| virtual uint32_t | getNumControllersPerColumn () const |
| Number of microcontrollers (uC) per column. | |
| bool | isCoreTile (int col, int row) const |
| Return true if the given tile is a Core tile. | |
| bool | isMemTile (int col, int row) const |
| Return true if the given tile is a Mem tile. | |
| bool | isShimNOCTile (int col, int row) const |
| Return true if the given tile is a ShimNOC tile. | |
| bool | isShimPLTile (int col, int row) const |
| Return true if the given tile is a ShimPL tile. | |
| bool | isShimNOCorPLTile (int col, int row) const |
| Return true if the given tile is either a ShimNOC or ShimPL tile. | |
| virtual bool | isValidTile (TileID src) const |
| Return true if the given tile ID is valid. | |
| bool | isInternal (int srcCol, int srcRow, int dstCol, int dstRow) const |
| Return true if src is the internal memory of dst. | |
| bool | isWest (int srcCol, int srcRow, int dstCol, int dstRow) const |
| Return true if src is West of dst. | |
| bool | isEast (int srcCol, int srcRow, int dstCol, int dstRow) const |
| Return true if src is East of dst. | |
| bool | isNorth (int srcCol, int srcRow, int dstCol, int dstRow) const |
| Return true if src is North of dst. | |
| bool | isSouth (int srcCol, int srcRow, int dstCol, int dstRow) const |
| Return true if src is South of dst. | |
| SharedMemory | getSharedMemory (TileID a, TileID b) const |
| Return the memory module a and b can both reach, if any. | |
| std::optional< uint32_t > | getLockLocalBaseIndex (int localCol, int localRow, int lockCol, int lockRow) const |
| Return the lock base index (or offset) in the local tile when accessing a neighbor's lock or an empty optional if an invalid neighbor is given Takes into account differences between Memory and Core tiles. | |
| std::optional< uint32_t > | getMemLocalBaseAddress (int localCol, int localRow, int memCol, int memRow) const |
| Return the memory base address (or offset) in the local tile when accessing a neighbor's memory or an empty optional if an invalid neighbor is given Takes into account differences between Memory and Core tiles. | |
| virtual uint32_t | getDefaultCoreStackSize () const |
| Return the default stack reservation (in bytes) for a core that does not state one. | |
| uint32_t | getCoreStackAlignment () const |
| Stack-pointer alignment in bytes, matching Peano's AIE frame lowering: AIE1/AIE2 require 32B; AIE2P/AIE2PS require 64B, not their 32B data bus. | |
| virtual uint32_t | getMemTileLoadStoreBusWidth () const |
| Return the data bus width (in bits) for load/store operations of a memory tile. | |
| uint32_t | getNumLocks (int col, int row) const |
| Return the number of lock objects for a tile at the given coordinates. | |
| uint32_t | getNumBDs (int col, int row) const |
| Return the number of buffer descriptors supported by the DMA in the given tile. | |
| uint32_t | getBDMaxDims (int col, int row) const |
| Return the maximum number of BD addressing dimensions for the tile at (col, row). | |
| uint64_t | getDmaBdMaxLen (int col, int row) const |
| uint32_t | getDmaBdWrapBits (int col, int row) const |
| uint32_t | getDmaBdStepBits (int col, int row) const |
| uint32_t | getDmaBdIterBits (int col, int row) const |
| uint32_t | getNumBDsForChannel (int col, int row, int channel) const |
| Return the number of buffer descriptors accessible on channel channel for the tile at (col, row). | |
| std::pair< uint32_t, uint32_t > | getBdIdRangeForChannel (int col, int row, int channel) const |
| Return the half-open range [first, last) of buffer descriptor ids that channel channel of the tile at (col, row) can submit. | |
| const DmaBdLayout * | getDmaBdLayout (int col, int row) const |
| uint32_t | getLocalDmaControlAddress (int col, int row, int channel, AIE::DMAChannelDir direction) const |
| Return the DMA task-queue register address relative to its tile. | |
| uint32_t | getDmaTaskQueueDepth (int, int, int, AIE::DMAChannelDir) const |
| Return the task-queue depth for one channel. | |
| void | validate () const |
| uint32_t | getModelProperties () const |
| void | addModelProperty (uint32_t prop) |
| bool | hasProperty (ModelProperty Prop) const |
| virtual uint32_t | getDefaultAxCache () const |
| const RegisterInfo * | lookupRegister (llvm::StringRef name, TileID tile, bool isMem=false) const |
| Register Database API - provides access to register and event information for trace configuration and low-level register access. | |
| std::optional< uint32_t > | lookupEvent (llvm::StringRef name, TileID tile, bool isMem=false) const |
| Lookup event number by name and tile. | |
| std::optional< uint32_t > | encodeFieldValue (const BitFieldInfo &field, uint32_t value) const |
| Encode a field value with proper bit shifting. | |
| std::optional< uint32_t > | getFieldMask (const BitFieldInfo &field) const |
| Compute a 32-bit mask for a register field. | |
| llvm::DenseMap< TileID, int > | getTileToControllerIdMap (bool columnWiseUniqueIDs=true) const |
| Return a mapping from tile coordinates to controller IDs. | |
| std::optional< uint32_t > | resolvePortValue (llvm::StringRef value, TileID tile, bool master) const |
| Resolve stream switch port specification to port index. | |
Static Public Member Functions | |
| static bool | classof (const AIETargetModel *model) |
| Static Public Member Functions inherited from xilinx::AIE::BaseNPU2TargetModel | |
| static bool | classof (const AIETargetModel *model) |
| Static Public Member Functions inherited from xilinx::AIE::AIE2TargetModel | |
| static bool | classof (const AIETargetModel *model) |
Definition at line 1270 of file AIETargetModel.h.
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inline |
Definition at line 1272 of file AIETargetModel.h.
References xilinx::AIE::BaseNPU2TargetModel::BaseNPU2TargetModel(), and xilinx::AIE::AIETargetModel::TK_AIE2_NPU2.
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inlinestatic |
Definition at line 1276 of file AIETargetModel.h.
References xilinx::AIE::AIETargetModel::getKind(), and xilinx::AIE::AIETargetModel::TK_AIE2_NPU2.
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inlineoverridevirtual |
Return the number of columns in the device.
Implements xilinx::AIE::AIETargetModel.
Definition at line 1274 of file AIETargetModel.h.