Overview

Architecture overview

The solution comprises:

The following block diagrams show how xbtIP could be integrated to a Versal or a VUP device. The presence and the quantity of xbtIP (power, memory and GT) depends on card and Alveo Versal Example Design (AVED) / Vitis™ Platform capabilities (refer to the respective documentation).

Alveo card block diagram

Versal

Virtex Ultrascale Plus (VUP)

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Versal Alveo card block diagram

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VUP Alveo card block diagram

xbtSW and xbtIP are used in conjunction to test on-board memories (for example DDR, HBM) and GTs while the card is consuming a programmable amount of power.

Multiple Alveo cards can be tested simultaneously and independently.

Hardware IP overview

xbtest hardware IP (xbtIP) includes the following types which test different areas of the card hardware:

  • Power: Throttles the clock of flip-flops, DSPs, block RAMs, UltraRAMs and AIEs present in the logic of the Alveo Versal Example Design (AVED), to control their power consumption.

  • Memory: Measures the read and write bandwidths & latencies while performing a data integrity check on the data transmitted and received.

  • GTYp PRBS, GTM PRBS, GT MAC: Checks GT transceivers of the Alveo™ card at 10, 25, 56 Gigabit Ethernet and 32Gb/s lane rates.

Any Alveo Versal Example Design (AVED) also contains the Verify xbtIP which includes the following hardware safety mechanisms:

  • Watchdog: Stops xbtIP IPs after a programmable delay (default 15 seconds) in the case of the xbtest application software (xbtSW) failing to perform the watchdog reset.

  • Status register:

    • Detects and prevents multiple instances of xbtSW trying to control/access the same Alveo card.

    • Detects if xbtIP clocks have been throttled down (if the card supports this safety feature). xbtIP clocks could have been slowed down automatically to prevent over-powering the card. Slower clock will affect test results.

  • DNA : Reports the FPGA DNA value (when accessible).

Note

Watchdog status and clock throttling detection are monitored on a regular basis during test execution.

Alveo Versal Example Design (AVED) is packaged in AVED deployment archive.

AVED deployment archives overview

xbtest application software (xbtSW) supports heterogeneous Alveo™ card installation by the addition of AVED deployment archives.

Important

The AVED deployment archive files should not be edited or modified. See Install xbtest section.

The AVED deployment archives includes xbtest specific files:

These files are automatically selected by xbtSW.

Application software overview

xbtest application software (xbtSW) automatically detects the number and type of xbtest hardware IP (xbtIP) present in Alveo Versal Example Design (AVED) (power, memory, or GT MAC).

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Software model

xbtSW is composed of two different layers:

The following steps are performed to launch a test:

  1. Checks the provided Command line options for validity and unsupported combinations.

  2. Checks integrity of all AVED deployment archives currently installed.

  3. Selects from the targeted card provided with command line option -d.

  4. Runs test on the targeted card with:

While running the test, xbtSW also manages the watchdog present in the different xbtest hardware IP (xbtIP) and checks that the Alveo card is not in use by another instance of the application.

Various sensors are monitored by default but others can be easily added (see Device management task description).