UL3524 Ultra Low Latency Trading

Building a Reference Design

Overview

Details on how to build a reference design.

Instructions

Synthesis, implementation, and bitstream generation can be run through the GUI or Tcl commands in Vivado.

Prior to following the below steps, ensure that the reference design has been successfully loaded and created (see Loading a Reference Design Vivado Project).

1. Click on Run Synthesis in Vivado or run the following Tcl commands to synthesize the design.

launch_runs synth_1
wait_on_run synth_1

1. Click on Run Implementation in Vivado or run the following Tcl commands to implement the design.

launch_runs impl_1
wait_on_run impl_1

1. Click on Generate Bitstream in Vivado or run the following Tcl command to generate the bitstream for the design.

write_bitstream 

Next Steps

Next steps can include:

• Simulating a design

• Programming the device

Support

For additional documentation, please refer to the UL3524 product page and the UL3524 Lounge.

For support, contact your FAE or refer to support resources at: https://support.xilinx.com

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