UL3524 Ultra Low Latency Trading

Loading a Reference Design Vivado Project

Overview

Details how to create and load a Vivado reference design.

Each reference design has a Tcl-script (setup.tcl) which allows the design to be recreated. The script will:

• Create the project

• Add source RTL files to the project

• Generate IP (if applicable)

• Generate IPI block design (if applicable)

Instructions

Use the steps below to load and recreate a reference design.

NOTE: Prior to running the script, ensure you have folder read/write access.

1. Open Vivado (either GUI or Tcl mode)

   • If opening the GUI, enter CTRL+Shift+T to open the Tcl console window

2. From within the Vivado Tcl command line, change directory to the Vivado_Project of the specific reference design to be loaded.

cd ./<reference_design_name>/Vivado_Project/

1. Run the following Tcl script from within the Vivado Tcl command line to create and load the design:

source ./setup.tcl

1. A directory with all the project files will be created in:

./<reference_design_name>/Vivado_Project/<project_name>

Once the script is complete, the following message will be displayed:

# ------------------------------------------------------
#
# Setup Complete...
#
# ------------------------------------------------------

Synthesis and implementation can be run through the GUI or Tcl command line.

Next Steps

Next steps can include:

• Simulating a design

• Building a design

Support

For additional documentation, please refer to the UL3524 product page and the UL3524 Lounge.

For support, contact your FAE or refer to support resources at: https://support.xilinx.com

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