UL3524 Ultra Low Latency Trading

IP¶

This folder contains any IP related files that are not included in the Vivado IP Catalog.

FINN¶

In this design, we are testing the impact of an IP block generated by FINN on the latency of the system.

The following options are available:

A prebuilt FINN IP
Details of the FINN MLP design
Instructions to rebuild the FINN IP

Build IP¶

The first thing to do is run ./get-finn.sh to clone the FINN repo into this directory and check out the supported version. Depending on the state of the xcvu2p-fsvj2104-3-e, additional steps may be needed in order to make the part available to FINN. See Targeting a Beta device in docker for more information or continue on if not relevant.

See FINN Getting Started for instructions on setting up the FINN compiler environment.

Now in order to build the IP run the following set of commands:

cd finn
# launch the build on the finn-mlp-design folder
./run-docker.sh build_custom ../finn-mlp-design

If changes to the design are needed, see the design README for further details.

Build outputs¶

After running the FINN compiler (which can take up to 13 hours for this design), you should see the generated outputs under finn-mlp-design:

/<4>UL3524/FINN_Latency/IP>>tree finn-mlp-design/ -L 1
finn-mlp-design/
├── build.py
├── custom_steps.py
├── folding_config.json
├── models                                         - Contains network in FINN-Onnx format, this is passed to the compiler
├── output_finn_latency-mlp_xcvu2p-fsvj2104-3-e    - Outputs generated by FINN compiler, see below
├── prebuilt
├── __pycache__
└── README.md

4 directories, 4 files

Looking closer at the output_finn_latency-mlp_xcvu2p-fsvj2104-3-e directory:

/<6>FINN_Latency/IP/finn-mlp-design>>tree output_finn_latency-mlp_xcvu2p-fsvj2104-3-e -L 1
output_finn_latency-mlp_xcvu2p-fsvj2104-3-e
├── auto_folding_config.json     - Folding config generated by the compiler
├── build_dataflow.log           - Build log
├── final_hw_config.json         - Final configuration used by the compiler, includes folding factors (SIMD & PE)
├── intermediate_models          - Onnx models of the network generated at each step of the build
├── report                       - Reports containing the estimated performance of the network (e.g. cycles per layer,
|                                  resource usage, throughput, alternative config suggestions).
|                                  N.B. These estimates do not account for the stitching added between components during
|                                       compilation and therefore do not give a true indication of performance. This is
|                                       a known issue and is under investigation.
├── stitched_ip                  - The generated stitched IP, this directory contains a Vivado project which can be
|                                  pulled into a wider design. The prebuilt design is a reduced copy of this directory
|                                  containing what is needed to regenerate the block in Vivado.
└── time_per_step.json           - A breakdown of the time it took to complete each step of the build

3 directories, 4 files

Targeting a Beta device in docker¶

As the FPGA part (xcvu2p-fsvj2104-3-e) for the UL3524 is currently a beta device, we need to add “init” scripts for Vivado and Vitis_HLS in order to find the part. The instructions to do this are well documented for the typical use case of the tools.

Problems arise when building with FINN which depends on a Docker container. In this scenario we need to make sure the init scripts are mounted to the container and accessible from within the docker instance. The packaged get-finn.sh script points to a modified version of FINN which supports this use case. It is still necessary to generate the .Xilinx directory structure and scripts as described in UG835 and enable the appropriate part, xcvu2p-fsvj2104-3-e in this case.

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